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SAH-C517A Datasheet(PDF) 10 Page - Infineon Technologies AG |
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SAH-C517A Datasheet(HTML) 10 Page - Infineon Technologies AG |
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10 / 72 page  C517A Semiconductor Group 8 PSEN 22 49 O The Program Store Enable output is a control signal that enables the external program memory to the bus during external fetch operations. It is activated every six oscillator periods except during external data memory accesses. The signal remains high during internal program execution. ALE 2350O The Address Latch enable output is used for latching the address into external memory during normal operation. It is activated every six oscillator periods except during an external data memory access. EA 24 51 I External Access Enable When held high, the C517A executes instructions from the internal ROM as long as the PC is less than 8000H. When held low, the C517A fetches all instructions from external program memory. For the C517A-L this pin must be tied low. For the C517A-4R, if the device is protected (see section 4.6 in the User Manual) then this pin is only latched during reset. P0.0 - P0.7 26, 27, 30 - 35 52 - 59 I/O Port 0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1’s written to them float, and in that state can be used as high- impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external program and data memory. In this application it uses strong internal pullup resistors when issuing 1’s. Port 0 also outputs the code bytes during program verification in the C517A- 4R. External pullup resistors are required during program verification. *) I = Input O = Output Table 1 Pin Definitions and Functions (cont’d) 6\PERO 3LQ1XPEHU ,2 )XQFWLRQ 304)3 3/&& |
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