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SAK-C164CI-L25M Datasheet(PDF) 9 Page - Infineon Technologies AG |
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SAK-C164CI-L25M Datasheet(HTML) 9 Page - Infineon Technologies AG |
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9 / 79 page  C164CI/SI C164CL/SL Data Sheet 5 V2.0, 2001-05 Table 2 Pin Definitions and Functions Symbol Pin No. Input Outp. Function P5 P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P5.6 P5.7 76 77 78 79 2 3 4 5 I I I I I I I I I Port 5 is an 8-bit input-only port with Schmitt-Trigger charact. The pins of Port 5 also serve as analog input channels for the A/D converter, or they serve as timer inputs: AN0 AN1 AN2 AN3 AN4, T2EUD GPT1 Timer T2 Ext. Up/Down Ctrl. Inp. AN5, T4EUD GPT1 Timer T4 Ext. Up/Down Ctrl. Inp. AN6, T2IN GPT1 Timer T2 Input for Count/Gate/Reload/Capture AN7, T4IN GPT1 Timer T4 Input for Count/Gate/Reload/Capture P3 P3.4 P3.6 P3.8 P3.9 P3.10 P3.11 P3.12 P3.13 P3.15 8 9 10 11 12 13 14 15 16 IO I I I/O I/O O I/O O O I/O O O Port 3 is a 9-bit bidirectional I/O port. It is bit-wise programmable for input or output via direction bits. For a pin configured as input, the output driver is put into high- impedance state. Port 3 outputs can be configured as push/ pull or open drain drivers. The input threshold of Port 3 is selectable (TTL or special). The following Port 3 pins also serve for alternate functions: T3EUD GPT1 Timer T3 External Up/Down Control Input T3IN GPT1 Timer T3 Count/Gate Input MRST SSC Master-Receive/Slave-Transmit Inp./Outp. MTSR SSC Master-Transmit/Slave-Receive Outp./Inp. TxD0 ASC0 Clock/Data Output (Async./Sync.) RxD0 ASC0 Data Input (Async.) or Inp./Outp. (Sync.) BHE External Memory High Byte Enable Signal, WRH External Memory High Byte Write Strobe SCLK SSC Master Clock Output / Slave Clock Input. CLKOUT System Clock Output (= CPU Clock), FOUT Programmable Frequency Output |
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