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TMDS171RGZT Datasheet(PDF) 6 Page - Texas Instruments |
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TMDS171RGZT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 62 page  6 TMDS171, TMDS171I SLLSEN7A – OCTOBER 2015 – REVISED DECEMBER 2015 www.ti.com Product Folder Links: TMDS171 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated (1) These values are based upon a microcontroller driving the control pins. The pull up/down/floating resistor configuration will set control pins properly which will have a different value than shown due to internal biasing. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VCC Supply Voltage Nominal Value 3.3 V 3.135 3.3 3.465 V VDD Supply Voltage Nominial Value 1.2 V 1.1 1.2 1.27 V TSTG Storage temperature –65 150 °C TCASE Case temperature 92.7 °C TA Operating free-air temperature (TMDS171) 0 85 °C Operating free-air temperature (TMDS171I) –40 85 °C MAIN LINK DIFFERENTIAL PINS VID(PP) Peak-to-peak input differential voltage 75 1560 mVpp VIC Input Common Mode Voltage VCC – 0.4 VCC + 0.1 V dR Data rate 0.25 3.4 Gbps R(VSADJ) TMDS compliant swing voltage bias resistor 1% 7.06 K Ω DDC, I2C, HPD, AND CONTROL PINS VI(DC) DC Input Voltage HDP_SNK, SDA_SNK, SCL_SNK, SDA_SRC, SCL_SRC –0.3 5.5 V All other Local I2C, and control pins –0.3 3.6 V VIL Low-level input voltage HPD 0.8 V Low-level input voltage at DDC/I2C 0.3 x VCC V Low-level input voltage at PRE_SEL, EQ_SEL/A0, TX_TERM_CTL, SWAP/POL pins only(1) 0.3 V VIM Mid-Level input voltage at PRE_SEL, EQ_SEL/A0, TX_TERM_CTL, SWAP/POL pins only(1) 1 1.2 1.4 V VIH High-level input voltage at HPD 2 V High-level input voltage at I2C and SDA_SRC, SCL_SRC 1.8 V High-level input voltage at SDA_SNK, SCL_SNK 2.8 High-level input voltage at PRE_SEL, EQ_SEL/A0, TX_TERM_CTL, SWAP/POL pins only(1) 2.6 V VOL Low-level output voltage 0.4 V VOH High-level output voltage 2.4 V fSCL SCL clock frequency fast I2C mode for local I2C control 400 kHz Cbus Total capacitive load for each bus line (DDC and local I2C terminals) 400 pF dR(DDC) DDC Data rate 100 400 kbps IIH High level input current 30 30 µA IIL Low level input current –25 25 µA IOS Short circuit output current –50 50 mA IOZ High impedance output current 10 µA R(OEPU) Pull up resistance on OE pin 150 250 K Ω (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6.4 Thermal Information THERMAL METRIC(1) RGZ (QFN) UNIT 48 PINS RθJA Junction-to-ambient thermal resistance 31.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 18.2 RθJB Junction-to-board thermal resistance 8.1 ψJT Junction-to-top characterization parameter 0.4 ψJB Junction-to-board characterization parameter 8.1 RθJC(bot) Junction-to-case (bottom) thermal resistance 3.2 |
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