HYB18T512160AF-37 datasheet(10/96 Pages) INFINEON

Part #	HYB18T512160AF-37

Description	512-Mbit Double-Data-Rate-Two SDRAM

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Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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HYB18T512[400/800/160]A[C/F]–[3.7/5]

512-Mbit Double-Data-Rate-Two SDRAM

Overview

Data Sheet

10

Rev. 1.13, 2004-05

09112003-SDM9-IQ3P

Address Signals

×16 organization

L2

BA0

I

SSTL

Bank Address Bus 1:0

L3

BA1

I

SSTL

L1

NC

–

M8

A0

I

SSTL

Address Signal 12:0

M3

A1

I

SSTL

M7

A2

I

SSTL

N2

A3

I

SSTL

N8

A4

I

SSTL

N3

A5

I

SSTL

N7

A6

I

SSTL

P2

A7

I

SSTL

P8

A8

I

SSTL

P3

A9

I

SSTL

M2

A10

I

SSTL

AP

I

SSTL

P7

A11

I

SSTL

R2

A12

I

SSTL

Data Signals

×4/×8 organizations

C8

DQ0

I/O

SSTL

Data Signal 0

C2

DQ1

I/O

SSTL

Data Signal 1

D7

DQ2

I/O

SSTL

Data Signal 2

D3

DQ3

I/O

SSTL

Data Signal 3

Data Signals

×8 organization

D1

DQ4

I/O

SSTL

Data Signal 4

D9

DQ5

I/O

SSTL

Data Signal 5

B1

DQ6

I/O

SSTL

Data Signal 6

B9

DQ7

I/O

SSTL

Data Signal 7

Data Signals

×16 organization

G8

DQ0

I/O

SSTL

Data Signal 0

G2

DQ1

I/O

SSTL

Data Signal 1

H7

DQ2

I/O

SSTL

Data Signal 2

H3

DQ3

I/O

SSTL

Data Signal 3

H1

DQ4

I/O

SSTL

Data Signal 4

H9

DQ5

I/O

SSTL

Data Signal 5

F1

DQ6

I/O

SSTL

Data Signal 6

F9

DQ7

I/O

SSTL

Data Signal 7

C8

DQ8

I/O

SSTL

Data Signal 8

C2

DQ9

I/O

SSTL

Data Signal 9

D7

DQ10

I/O

SSTL

Data Signal 10

Table 3

Pin Configuration of DDR SDRAM

Ball#/Pin#

Name

Type

Buffer

Type

Function

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HYB18T512160AF-37 Datasheet(PDF) 10 Page - Infineon Technologies AG

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