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HYB39S256160DTL-8 Datasheet(PDF) 11 Page - Infineon Technologies AG |
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HYB39S256160DTL-8 Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 22 page INFINEON Technologies 11 2002-04-23 HYB39S256400/800/160DT(L)/DC(L) 256MBit Synchronous DRAM Mode Register Set Table A11 A3 A4 A2 A1 A0 A10 A9 A8 A7 A6 A5 Address Bus (Ax) BT Burst Length CAS Latency Mode Register (Mx) CAS Latency M6 M5 M4 Latency 0 0 0 Reserved 0 0 1 Reserved 01 0 2 01 1 3 10 0 Reserved 10 1 11 0 11 1 Burst Length M2 M1 M0 Length Sequential Interleave 000 1 1 001 2 2 010 4 4 011 8 8 100 Reserved Reserved 101 110 111 Full Page Burst Type M3 Type 0 Sequential 1 Interleave Operation Mode M9 Mode 0 burst read / burst write 1 burst read / single write Operation Mode BA0 BA1 A12 |
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