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HYS64T64020GDL-5-A Datasheet(PDF) 6 Page - Infineon Technologies AG |
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HYS64T64020GDL-5-A Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 48 page 200-Pin Small Outline Dual-In-Line Memory Module DDR2 SDRAM HYS64T32000[G/H]DL–[3.7/5]–A HYS64T64020[G/H]DL–[3.7/5]–A HYS64T128021[G/H]DL–[3.7/5]–A Data Sheet 6 Rev. 0.91, 2004-06 09122003-FTXN-KM26 1 Overview This chapter gives an overview of the 1.8 V 200-Pin Small Outline Dual-In-Line Memory Module, 256 MByte and 512 MByte and describes its main characteristics. 1.1 Features • 200-pin Non-ECC Unbuffered 8-Byte Dual-In-Line DDR2 SDRAM Module for Notebooks and other application where small form factors are required. • One rank 32M × 64, two ranks 64M × 64 and 128M × 64 module organisation and 32M × 16 and 64M × 8 chip organisation • JEDEC standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply • 256 ,512 MByte and 1GByte modules built with 512Mb DDR2 SDRAMs in 60-ball FBGA (P–TFBGA–60) and 84-ball FBGA (P–TFBGA–84) chipsize packages • Programmable CAS Latencies (3, 4 and 5), Burst Length (4 & 8) and Burst Type • Auto Refresh (CBR) and Self Refresh • All inputs and outputs SSTL_1.8 compatible • Off-Chip Driver Impedance Adjustment(OCD) and On-Die Termination(ODT) • Serial Presence Detect with E 2PROM • Low Profile Modules form factor: 67.60 mm x 30.00 mm (MO-224) • Based on JEDEC standard reference layouts Raw Card “A”, “C” and “D” 1.2 Description The INFINEON HYS64T[32000/64020/128021][G/H]DL–[3.7/5]–A module family are low profile SO-DIMM modules with 30,0 mm height based on DDR2 technology. DIMMs are available as Non-ECC modules in 32M × 64 (256 MByte),64M × 64 (512 MByte) and 128M × 64 (1 GByte) organisation and density, intended for mounting into 200-pin connector sockets. The memory array is designed with 512Mb Double- Data-Rate-Two (DDR2) Synchronous DRAMs. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E 2PROM device using the 2-pin I2C protocol. The first 128 bytes are programmed with configuration data and are write protected; the second 128 bytes are available to the customer. Table 1 Performance Product Type Speed Code –3.7 –5 Units Speed Grade PC2–4200 4–4–4 PC2–3200 3–3–3 — max. Clock Frequency @CL5 f CK5 266 200 MHz @CL4 f CK4 266 200 MHz @CL3 f CK3 200 200 MHz min. RAS-CAS-Delay t RCD 15 15 ns min. Row Precharge Time t RP 15 15 ns min. Row Active Time t RAS 45 40 ns min. Row Cycle Time t RC 60 55 ns |
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