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HYS64D64020GU-8-B Datasheet(PDF) 8 Page - Infineon Technologies AG |
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HYS64D64020GU-8-B Datasheet(HTML) 8 Page - Infineon Technologies AG |
8 / 51 page HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B Unbuffered DDR SDRAM Modules Pin Configuration Data Sheet 8 V1.1, 2003-07 2 Pin Configuration Note: S1 and CKE1 are used on two rank modules only Table 4 Pin Definitions and Functions Symbol Type 1) 1) I: Input; O: Output; I/O: bidirectional In-/Output; AI: Analog Input; PWR: Power Supply; GND: Signal Ground; NC: Not Connected Function A0 - A12 I Address Inputs BA0, BA1 I Bank Selects DQ0 - DQ63 I/O Data Input/Output CB0 - CB7 I/O Check Bits ( × 72 organization only) RAS, CAS, WE I Command Inputs CKE0 - CKE1 I Clock Enable DQS0 - DQS8 I/O SDRAM low data strobes CK0 - CK2, I SDRAM clock (positive lines) CK0 - CK2 I SDRAM clock (negative lines) DM0 - DM8 DQS9 - DQS17 I I/O SDRAM low data mask/ high data strobes S0, S1 I Chip Selects for Rank0 and Rank1 VDD PWR Power (+2.5 V) V SS GND Ground V DDQ PWR I/O Driver power supply V DDID PWR VDD Indentification flag V REF AI I/O reference supply VDDSPD PWR Serial EEPROM power supply SCL I Serial bus clock SDA I/O Serial bus data line SA0 - SA2 I slave address select NC NC Not Connected |
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