HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A

Registered DDR2 SDRAM Modules

Data Sheet

4

Rev. 0.85, 2004-04

Preliminary

1.3 Components on Modules and RawCard

1.4 Pin Definition and Function

DIMM

Density

DRAM components

reference datasheet

PLL

Register

Raw Card

512 MB

HYB18T512800AC

HYB18T512800AF

1:10, 1.8V, CU877

1:1 25-bit 1.8V SSTU32864

A

1024 MB

HYB18T512800AC

HYB18T512800AF

1:10, 1.8V, CU877

1:2 14-bit 1.8V SSTU32864

B

1024 MB

HYB18T512400AC

HYB18T512400AF

1:10, 1.8V, CU877

1:2 14-bit 1.8V SSTU32864

C

2048 MB

HYB18T512400AC

HYB18T512400AF

tbd.

tbd.

tbd.

2048 MB

HYB18T512400AC

HYB18T512400AF

tbd.

tbd.

tbd.

For a detailed description of all functionalities of the DRAM components on these modules see the referenced component data

sheet

Pin Name

Description

Pin Name

Description

A[13:0]

Row Address Inputs

CB[7:0]

DIMM ECC Check Bits

A11, A[9:0]

Column Address Inputs

4)

DQS[8:0]

SDRAM low data strobes

A10/AP

Column Address Input for Auto-

Precharge

DM[8:0] /

DQS[17:9]

SDRAM low data mask/

high data strobes

BA[1:0]

SDRAM Bank Selects

DQS[17:0]

SDRAM differential data strobes

CK0

Clock input

(positive line of differential pair)

SCL

Serial bus clock

CK0

Clock input

(negative line of differential pair)

SDA

Serial bus data line

RAS

Row Address Strobe

SA[2:0]

slave address select

CAS

Column Address Strobe

V

DD

Power (+ 1.8 V)

WE

Read/Write Input

V

REF

I/O reference supply

CS[1:0]

Chip Selects

3)

V

SS

Ground

CKE[1:0]

Clock Enable

3)

V

DDSPD

EEPROM power supply

ODT[1:0]

Active termination control lines

1) 3)

RESET

Register and PLL control pin

2)

DQ[63:0]

Data Input/Output

NC

No connection

1) Active termination only applies to DQ, DQS, DQS and DM signals

2) When low, all register outputs will be driven low and the PLL clocks to the DRAM and registers will be set to low levels (the

PLL will remain synchronized with the input clock

3) CS1, ODT1 and CKE1 are used on dual rank modules only

4) Column address A11 is used on modules based on x4 organised 512Mb DDR2 components only.