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SN54LV164A Datasheet(PDF) 1 Page - Texas Instruments |
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SN54LV164A Datasheet(HTML) 1 Page - Texas Instruments |
1 / 30 page C1 1D R C1 1D R Q Q A B C1 1D R C1 1D R Q Q C D C1 1D R C1 1D R Q Q E F C1 1D R C1 1D R Q Q G H 3 4 5 6 10 11 12 13 8 1 2 9 CLK A B CLR Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages. Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LV164A, SN74LV164A SCLS403I – APRIL 1998 – REVISED MARCH 2015 SNx4LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features 2 Applications 1 • 2-V to 5.5-V VCC Operation • IP Routers • Maximum tpd of 10.5 ns at 5 V • Enterprise Switches • Typical VOLP (Output Ground Bounce) • Access Control and Security: Access Keypads < 0.8 V at VCC = 3.3 V, TA = 25°C and Biometrics • Typical VOHV (Output VOH Undershoot) • Smart Meters: Power Line Communication > 2.3 V at VCC = 3.3 V, TA = 25°C 3 Description • Ioff Supports Live Insertion, Partial Power-Down The SNx4LV164A devices are 8-bit parallel-out serial Mode, and Back-Drive Protection shift registers designed for 2-V to 5.5-V VCC • Support Mixed-Mode Voltage Operation on operation. All Ports • Latch-up Performance Exceeds 250 mA Device Information(1) Per JESD 17 PART NUMBER PACKAGE BODY SIZE (NOM) • ESD Protection Exceeds JESD 22 SOIC (14) 8.65 mm × 3.91 mm – 2000-V Human-Body Model (A114-A) SSOP (14) 6.20 mm × 5.30 mm – 1000-V Charged-Device Model (C101) TVSOP (14) 3.60 mm × 4.40 mm SN74LV164A SOP (14) 10.30 mm × 5.30 mm TSSOP (14) 5.00 mm × 4.40 mm VQFN (14) 3.50 mm × 3.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. |
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Similar Description - SN54LV164A_15 |
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