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SN74LV123APWRG4 Datasheet(PDF) 3 Page - Texas Instruments |
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SN74LV123APWRG4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 34 page SN54LV123A SN74LV123A www.ti.com SCLS393Q – APRIL 1998 – REVISED AUGUST 2015 5 Description (continued) These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low. 6 Pin Configuration and Functions D, DB, DGV, NS, or PW Package RGY Package 16-Pin SOIC, SSOP, SO, TSSOP 16-Pin VQFN Top View Top View Pin Functions PIN I/O DESCRIPTION NAME NO. 1A 1 I Channel 1 falling edge trigger input when 1B = L; Hold low for other input methods 1B 2 I Channel 1 rising edge trigger input when 1A = H; Hold high for other input methods Channel 1 rising edge trigger when 1A = H and 1B = L; Hold high for other input methods; 1CLR 3 I Can cut pulse length short by driving low during output 1Q 4 O Channel 1 inverted output 2Q 5 O Channel 2 output 2Cext 6 — Channel 2 external capacitor negative connection 2Rext/Cext 7 — Channel 2 external capacitor and resistor junction connection GND 8 — Ground 2A 9 I Channel 2 falling edge trigger input when 2B = L; Hold low for other input methods 2B 10 I Channel 2 rising edge trigger input when 2A = H; Hold high for other input methods Channel 2 rising edge trigger when 2A = H and 2B = L; Hold high for other input methods; 2CLR 11 I Can cut pulse length short by driving low during output 2Q 12 O Channel 2 inverted output 1Q 13 O Channel 1 output 1Cext 14 — Channel 1 external capacitor negative connection 1Rext/Cext 15 — Channel 1 external capacitor and resistor junction connection VCC 16 — Power supply Copyright © 1998–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: SN54LV123A SN74LV123A |
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