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SN74LV240APWG4 Datasheet(PDF) 5 Page - Texas Instruments |
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SN74LV240APWG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 27 page SN54LV240A, SN74LV240A www.ti.com SCLS384I – SEPTEMBER 1997 – REVISED FEBRUARY 2015 7.3 Recommended Operating Conditions see (1) MIN MAX UNIT VCC Supply voltage 2 5.5 V VCC = 2 V 1.5 VCC = 2.3 to 2.7 V VCC × 0.7 VIH High-level input voltage V VCC = 3 to 3.6 V VCC × 0.7 VCC = 4.5 to 5.5 V VCC × 0.7 VCC = 2 V 0.5 VCC = 2.3 to 2.7 V VCC × 0.3 VIL Low-level input voltage V VCC = 3 to 3.6 V VCC × 0.3 VCC = 4.5 to 5.5 V VCC × 0.3 VI Input voltage 0 5.5 V High or low state 0 VCC VO Output voltage V 3-state 0 5.5 VCC = 2 V –50 µA VCC = 2.3 to 2.7 V –2 IOH High-level output current VCC = 3 to 3.6 V –8 mA VCC = 4.5 to 5.5 V –16 VCC = 2 V 50 µA VCC = 2.3 to 2.7 V 2 IOL Low-level output current VCC = 3 to 3.6 V 8 mA VCC = 4.5 to 5.5 V 16 VCC = 2.3 to 2.7 V 200 Δt/Δv Input transition rise or fall rate VCC = 3 to 3.6 V 100 ns/V VCC = 4.5 to 5.5 V 20 SN54LV240A –55 125 TA Operating free-air temperature °C SN74LV240A –40 125 (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004. 7.4 Thermal Information DW DB DGV NS PW THERMAL METRIC(1) UNIT 20 PINS RθJA Junction-to-ambient thermal resistance(2) 79.2 94.5 116.2 76.7 102.4 RθJC(top) Junction-to-case (top) thermal resistance 43.7 56.4 31.2 43.2 36.5 RθJB Junction-to-board thermal resistance 47.0 49.7 57.7 44.2 53.6 °C/W ψJT Junction-to-top characterization parameter 18.6 18.5 0.9 16.8 2.4 ψJB Junction-to-board characterization parameter 46.5 49.3 57.0 43.8 52.9 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The package thermal impedance is calculated in accordance with JESD 51-7. Copyright © 1997–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: SN54LV240A SN74LV240A |
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