2A

2Y

2OE

1A

1Y

1OE

4A

4Y

4OE

3A

3Y

3OE

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74LV125A

SCES124N – DECEMBER 1997 – REVISED JANUARY 2016

SN74LV125A Quadruple Bus Buffer Gates With 3-State Outputs

1

1 Features

1

•

•

•

•

•

Support Mixed-Mode Voltage Operation on

All Ports

•

•

Latch-Up Performance Exceeds 250 mA Per

JESD 17

•

ESD Protection Exceeds JESD 22

–

4000-V Human-Body Model

–

200-V Machine Model

–

2000-V Charged-Device Model

2 Applications

•

Flow Meters

•

Solid State Drives (SSDs): Enterprise

•

Power Over Ethernet (PoE)

•

Programmable Logic Controllers

•

Motor Drives and Controls

•

Electronic Points of Sale

3 Description

The SN74LV125A quadruple bus buffer gate is

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

SN74LV125A

TVSOP (14)

3.60 mm x 4.40 mm

SOIC (14)

8.65 mm × 3.91 mm

SOP (14)

10.30mm x 5.30 mm

SSOP (14)

6.20 mm x 5.30 mm

TSSOP (14)

5.00 mm x 4.40 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

4 Simplified Schematic