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F28M36H53C2ZWTT Datasheet(PDF) 3 Page - Texas Instruments |
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F28M36H53C2ZWTT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 253 page  C9-C15 RAM 7 8KB ´ (parity) C2-C8 RAM 7 8KB ´ (parity) SECURE FLASH 1MB (ECC) BOOT ROM 64KB GPIO_MUX1 SECURE C1 RAM 8KB (ECC) SECURE C0 RAM 8KB (ECC) AHB BUS APB BUS S0-S7 SHARED RAM (parity) S0 8KB S1 8KB S2 8KB S3 8KB S4 8KB S5 8KB S6 8KB S7 8KB MTOC MSG RAM (parity) 2KB CTOM MSG RAM (parity) 2KB IPC INTER- PROC COMM M3 SYSTEM BUS uDMA BUS L3 RAM 8KB (parity) L2 RAM 8KB (parity) SECURE FLASH 512KB (ECC) BOOT ROM 64KB SECURE L1 RAM 8KB (ECC) SECURE L0 RAM 8KB (ECC) GPIO_MUX1 M1 RAM 2KB (ECC) M0 RAM 2KB (ECC) C28 CPU BUS C28 DMA BUS 16- BIT PF2 32- BIT PF1 32- BIT PF3 C28 CPU C28 FPU C28 VCU C28 DMA M3 CPU NVIC MPU M3 BUS MATRIX M3 uDMA I-CODE BUS D-CODE BUS 136 PINS REGS ONLY PIE ADC_1 MODULE ADC_2 MODULE 16/32 - BIT PF0 ANALOG SUBSYSTEM 6 COMP INPUTS 6 COMP INPUTS 12 ADC INPUTS 6 COMP OUT PUTS 12 ADC INPUTS 6 COMPARE + DAC UNITS MEM32 TO AHB BUS BRIDGE 1.2-V VREG 1.8-V VREG C28 CPU/DMA ACCESS TO EPI INTER- PROC COMM RESETS NMI CLOCKS SECURITY DEBUG FREQ GASKET F28M36P63C2, F28M36P53C2, F28M36H53C2, F28M36H53B2 F28M36H33C2, F28M36H33B2 www.ti.com SPRS825D – OCTOBER 2012 – REVISED OCTOBER 2015 1.4 Functional Block Diagram Figure 1-1. Functional Block Diagram Copyright © 2012–2015, Texas Instruments Incorporated Device Overview 3 Submit Documentation Feedback Product Folder Links: F28M36P63C2 F28M36P53C2 F28M36H53C2 F28M36H53B2 F28M36H33C2 F28M36H33B2 |
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