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F28M35M52C1RFPS Datasheet(PDF) 1 Page - Texas Instruments

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Part # F28M35M52C1RFPS
Description  Microcontrollers
Download  235 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

F28M35M52C1RFPS Datasheet(HTML) 1 Page - Texas Instruments

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F28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, F28M35E20B
SPRS742I – JUNE 2011 – REVISED JUNE 2015
F28M35x Concerto™ Microcontrollers
1
Device Overview
1.1
Features
1
• Master Subsystem — ARM® Cortex®-M3
• Control Subsystem — TMS320C28x 32-Bit CPU
– Up to 100 MHz
– Up to 150 MHz
– Embedded Memory
– C28x Core Hardware Built-in Self-Test
– Embedded Memory
Up to 512KB of Flash (ECC)
Up to 512KB of Flash (ECC)
Up to 32KB of RAM (ECC or Parity)
Up to 36KB of RAM (ECC or Parity)
Up to 64KB of Shared RAM
Up to 64KB of Shared RAM
2KB of IPC Message RAM
– Five Universal Asynchronous
2KB of IPC Message RAM
Receiver/Transmitters (UARTs)
– IEEE-754 Single-Precision Floating-Point Unit
– Four Synchronous Serial Interfaces (SSIs) and
(FPU)
a Serial Peripheral Interface (SPI)
– Viterbi, Complex Math, CRC Unit (VCU)
– Two Inter-integrated Circuits (I2Cs)
– Serial Communications Interface (SCI)
– Universal Serial Bus On-the-Go (USB-OTG) +
– SPI
PHY
– I2C
– 10/100 ENET 1588 MII
– 6-Channel Direct Memory Access (DMA)
– Two Controller Area Network, D_CAN, Modules
– Nine Enhanced Pulse Width Modulator (ePWM)
(Pin-Bootable)
Modules
– 32-Channel Micro Direct Memory Access
18 Outputs (16 High-Resolution)
(µDMA)
– Six 32-Bit Enhanced Capture (eCAP) Modules
– Dual Security Zones (128-Bit Password per
– Three 32-Bit Enhanced Quadrature Encoder
Zone)
Pulse (eQEP) Modules
– External Peripheral Interface (EPI)
– Multichannel Buffered Serial Port (McBSP)
– Micro Cyclic Redundancy Check (µCRC)
– EPI
Module
– One Security Zone (128-Bit Password)
– Four General-Purpose Timers
– Three 32-Bit Timers
– Two Watchdog Timer Modules
– Endianness: Little Endian
– Endianness: Little Endian
• Analog Subsystem
• Clocking
– Dual 12-Bit Analog-to-Digital Converters (ADCs)
– On-chip Crystal Oscillator and External Clock
– Up to 2.88 MSPS
Input
– Up to 20 Channels
– Dynamic Phase-Locked Loop (PLL) Ratio
– Four Sample-and-Hold (S/H) Circuits
Changes Supported
– Up to Six Comparators With 10-Bit Digital-to-
• 1.2-V Digital, 1.8-V Analog, 3.3-V I/O Design
Analog Converter (DAC)
• Interprocessor Communications (IPC)
• Package
– 32 Handshaking Channels
– 144-Pin RFP PowerPAD™ Thermally Enhanced
– Four Channels Generate IPC Interrupts
Thin Quad Flatpack (HTQFP)
– Can be Used to Coordinate Transfer of Data
• Temperature Options:
Through IPC Message RAMs
– T: –40ºC to 105ºC Junction
• Up to 74 Individually Programmable, Multiplexed
– S: –40ºC to 125ºC Junction
General-Purpose Input/Output (GPIO) Pins
– Q: –40ºC to 125ºC Free-Air
– Glitch-free I/Os
(Q100 Qualification for Automotive Applications)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


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