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DRV110PWR Datasheet(PDF) 10 Page - Texas Instruments |
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DRV110PWR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 24 page S,max DC S Gate,AVE V 15V R 1mA I - = + DRV110 SLVSBA8B – MARCH 2012 – REVISED JULY 2015 www.ti.com Feature Description (continued) Voltage at the OUT pin, that is the gate voltage of an external switching device, is equal to VIN voltage during ON-cycle. The voltage is driven to ground during OFF-cycle. VIN voltages below 15 V can be supplied directly from an external voltage source. Supply voltages of at least 6 V are supported. The DRV110 is able to regulate VIN voltage to 15 V from a higher external supply voltage, VS, by an internal bypass regulator that replicates the function of an ideal Zener diode. This requires that the supply current is sufficiently limited by an external resistor between VS and the VIN pin. An external capacitor connected to the VIN pin is used to store enough energy to charge the external switch gate capacitance at the OUT pin. Current limiting resistor size to keep quiescent current less than 1 mA can be calculated by Equation 5. (5) Open-drain pulldown path at the STATUS pin is deactivated if either undervoltage lockout or thermal shutdown blocks have triggered. 7.4 Device Functional Modes The DRV110 transitions through three different states. The first is the OFF state, where the EN pin is low and the PWM output is off. The second is the PEAK state, which begins when the EN pin is set high, and ends once tKEEPhas been reached. During this state, the PWM operates in order to reach the IPEAK set by the RPEAK. Finally, once tKEEP has been reached, the PWM continues to operate, but at the IHOLD level. This continues until the EN pin is set low again and the PWM turns off. 10 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: DRV110 |
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