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TDK5100 Datasheet(PDF) 11 Page - Infineon Technologies AG |
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TDK5100 Datasheet(HTML) 11 Page - Infineon Technologies AG |
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11 / 40 page  Functional Description 2 - 5 TDK 5100 Wireless Components Specification, October 2002 8 CLKOUT Clock output to supply an external device. An external pull-up resistor has to be added in accordance to the driving requirements of the external device. A clock frequency of 3.39 MHz is selected by a logic low at CLKDIV input (pin9). A clock frequency of 847.5 kHz is selected by a logic high at CLKDIV input (pin9). 9 CLKDIV This pin is used to select the desired clock division rate for the CLKOUT signal. A logic low (CLKDIV < 0.2 V) applied to this pin selects the 3.39 MHz output signal at CLKOUT (pin 8). A logic high (CLKDIV open) applied to this pin selects the 847.5 kHz output signal at CLKOUT (pin 8). 10 COSC This pin is connected to the reference oscil- lator circuit. The reference oscillator is working as a neg- ative impedance converter. It presents a negative resistance in series to an induc- tance at the COSC pin. 11 FSKOUT This pin is connected to a switch to FSKGND (pin 12). The switch is closed when the signal at FSKDTA (pin 7) is in a logic low state. The switch is open when the signal at FSKDTA (pin 7) is in a logic high state. FSKOUT can switch an additional capacitor to the reference crystal network to pull the crystal frequency by an amount resulting in the desired FSK frequency shift of the trans- mitter output frequency. 12 FSKGND Ground connection for FSK modulation out- put FSKOUT. 8 300 Ω V S +1.2 V 60 k Ω 9 5 µA 60 k Ω +0.8 V V S V S 6 k Ω 10 100 µA V S V S V S 200 µA 1.5 k Ω 11 12 V S |
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Similar Description - TDK5100 |
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