TE3-MUX datasheet(7/211 Pages) INFINEON

Part #	TE3-MUX

Description	TE3-MUX M13 Multiplexer and DS3 Framer

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Manufacturer	INFINEON [Infineon Technologies AG]

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7 / 211 page

PEB 3445 E

Data Sheet

7

2001-06-29

7.2.6

C-Bit Path Maintenance (HDLC) Registers . . . . . . . . . . . . . . . . . . . . . 171

8

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

8.1

Important Electrical Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

8.2

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

8.3

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183

8.4

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184

8.4.1

Local Microprocessor Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . 185

8.4.1.1

Intel Bus Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185

8.4.1.2

Motorola Bus Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188

8.4.2

DMA Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

8.4.2.1

DMA Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

8.4.2.2

DMA Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192

8.4.3

Serial Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

8.4.3.1

DS3 Serial Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

8.4.3.2

Overhead Bit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196

8.4.3.3

Stuff Bit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198

8.4.3.4

DS1/E1 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

8.4.3.5

DS3 System Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203

8.4.4

JTAG Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205

8.4.5

Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206

9

Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207

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