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LM2451 Datasheet(PDF) 3 Page - Texas Instruments |
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LM2451 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 14 page  +220V +12V 12 CL = 10 pF 50: Output to 50: Scope 10 PF 0.1 PF + 7 1,3,5 2451 13,14,15 47 PF 0.1 PF VADJ 50: 1000: 0.47 PF 0.01 PF VIN 9,10,11 50: Test Point 4990: 4990: 0.1 PF Pulse Generator Input VDAC 2,4,6 8 IK Note: VDAC < 0.5V OBSOLETE LM2451 www.ti.com SNOSAN7I – AUGUST 2005 – REVISED APRIL 2013 Electrical Characteristics (See Figure 3 for Test Circuit). Unless otherwise noted: VCC = +220V, VBB = +12V, VDAC = +0.5V, CL = 10 pF, TC = 50°C. DC Tests: VIN = +2.7VDC. AC Tests: Output = 130VPP (60V – 190V) at 1 MHz. LM2451 Symbol Parameter Conditions Units Min Typ Max ICC Supply Current No Input Signal, No Video Input, No 10 18 25 mA Output Load IBB Bias Current 18 26 34 mA VOUT, 1 DC Output Voltage No AC Input Signal, VIN = 2.7VDC 122 127 132 VDC VOUT, 2 DC Output Voltage No AC Input Signal, VIN = 1.2VDC 200 205 210 VDC VOUT, 3 DC Output Voltage No AC Input Signal, VIN = 1.2VDC, VDAC = 192 198 204 VDC 1.2VDC VOUT, 4 DC Output Voltage No AC Input Signal, VIN = 1.2VDC, VDAC = 154 160 166 VDC 2.7VDC AV DC Voltage Gain No AC Input Signal −51 −54 −57 V/V ADAC DAC Input DC Voltage Gain No AC Input Signal −23 −26 −29 V/V ΔAV Gain Matching See(1), No AC Input Signal 1.0 dB LE Linearity Error See(1)(2), No AC Input Signal 8 % tr Rise Time See(3), 10% to 90% 31 ns +OS Overshoot 10 % tf Fall Time See(3), 90% to 10% 34 ns −OS Overshoot See(3) 3 % BWL Large Signal Bandwidth VOUT AC = 130 VP-P, VOUT DC = 125 V 12 MHz BWM Medium Signal Bandwidth VOUT AC = 100 VP-P, VOUT DC = 125 V 14 MHz BWS Small Signal Bandwidth VOUT AC = 60 VP-P, VOUT DC = 125 V 16 MHz IkERROR Current Output Error Output Current = 0 µA to 200 µA −52 0 52 μA ΔIkERROR Current Output Difference Output Current = 0 µA to 200 µA 0 NA 32 μA Between Channels (1) Calculated value from Voltage Gain test on each channel. (2) Linearity Error is the variation in DC gain from VIN = 1.10V to VIN = 4.30V. (3) Input from signal generator: tr, tf < 10 ns. AC Test Circuit Note: 10 pF load includes parasitic capacitance. Figure 3. Test Circuit (One Channel) Figure 3 shows a typical test circuit for evaluation of the LM2451. This circuit is designed to allow testing of the LM2451 in a 50 Ω environment without the use of an expensive FET probe. The two 4990Ω resistors form a 400:1 divider with the 50 Ω resistor and the oscilloscope. A test point is included for easy use of an oscilloscope probe. The compensation capacitor is used to compensate the network to achieve flat frequency response. Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM2451 |
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