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ISL8117EVAL1Z Datasheet(PDF) 5 Page - Intersil Corporation |
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ISL8117EVAL1Z Datasheet(HTML) 5 Page - Intersil Corporation |
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5 / 23 page  ISL8117 5 FN8666.3 June 4, 2015 Submit Document Feedback Block Diagram 5VCC 5VCC BOOT UGATE PHASE LGATE/OCS PGND PGND ADAPTIVE DEAD TIME V/I SAMPLE TIMING POR ENABLE BIAS SUPPLIES REFERENCE FAULT LATCH OV/UV OC FB SW THRES. PGOOD EN VIN VCC5V EXTBIAS MOD/SYNC FB SS/TRK ISEN 2µA SS/TRK SS/TRK + _ + _ 0.6V REF + _ 1.75V REFERENCE DUTY CYCLE RAMP GENERATOR CLOCK RT SGND LGATE/OCS LGATE/OCS OC CLKOUT PWM CURRENT SAMPLE CURRENT SAMPLE SAME STATE FOR 2 CLOCK CYCLES REQUIRED TO LATCH OVERCURRENT FAULT VIN 5VCC SEE Note 6 FIGURE 3. BLOCK DIAGRAM |
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