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HD6433800 Datasheet(PDF) 11 Page - Hitachi Semiconductor |
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HD6433800 Datasheet(HTML) 11 Page - Hitachi Semiconductor |
11 / 435 page i Contents Section 1 Overview.............................................................................................................. 1 1.1 Overview............................................................................................................................ 1 1.2 Internal Block Diagram......................................................................................................5 1.3 Pin Arrangement and Functions......................................................................................... 6 1.3.1 Pin Arrangement ................................................................................................... 6 1.3.2 Pin Functions ........................................................................................................ 8 Section 2 CPU........................................................................................................................ 11 2.1 Overview............................................................................................................................ 11 2.1.1 Features ................................................................................................................. 11 2.1.2 Address Space....................................................................................................... 12 2.1.3 Register Configuration.......................................................................................... 12 2.2 Register Descriptions ......................................................................................................... 13 2.2.1 General Registers.................................................................................................. 13 2.2.2 Control Registers .................................................................................................. 13 2.2.3 Initial Register Values .......................................................................................... 14 2.3 Data Formats...................................................................................................................... 15 2.3.1 Data Formats in General Registers ....................................................................... 16 2.3.2 Memory Data Formats .......................................................................................... 17 2.4 Addressing Modes.............................................................................................................. 18 2.4.1 Addressing Modes ................................................................................................ 18 2.4.2 Effective Address Calculation .............................................................................. 20 2.5 Instruction Set .................................................................................................................... 24 2.5.1 Data Transfer Instructions .................................................................................... 26 2.5.2 Arithmetic Operations .......................................................................................... 28 2.5.3 Logic Operations .................................................................................................. 29 2.5.4 Shift Operations .................................................................................................... 29 2.5.5 Bit Manipulations ................................................................................................. 31 2.5.6 Branching Instructions.......................................................................................... 35 2.5.7 System Control Instructions.................................................................................. 37 2.5.8 Block Data Transfer Instruction............................................................................ 38 2.6 Basic Operational Timing .................................................................................................. 40 2.6.1 Access to On-Chip Memory (RAM, ROM) ......................................................... 40 2.6.2 Access to On-Chip Peripheral Modules................................................................ 41 2.7 CPU States ......................................................................................................................... 43 2.7.1 Overview............................................................................................................... 43 2.7.2 Program Execution State ...................................................................................... 44 2.7.3 Program Halt State................................................................................................ 44 2.7.4 Exception-Handling State ..................................................................................... 44 |
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