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HD6437021VX Datasheet(PDF) 5 Page - Hitachi Semiconductor |
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HD6437021VX Datasheet(HTML) 5 Page - Hitachi Semiconductor |
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5 / 507 page  Organization of This Manual Table 1 describes how this manual is organized. Figure 1 shows the relationships between the Sections within this manual. Table 1 Manual Organization Category Section Title Abbrevi- ation Contents Overview 1. Overview — Features, internal block diagram, pin layout, pin functions CPU 2. CPU CPU Register configuration, data structure. instruction features, instruction types, instruction lists Operating Modes 3. Operating Modes — MCU mode, PROM mode Internal Modules 4. Exception Processing — Resets, address errors, interrupts, trap instructions, illegal instructions 5. Interrupt Controller INTC NMI interrupts, user break interrupts, IRQ interrupts, on-chip module interrupts 6. User Break Controller UBC Break address and break bus cycles selection Clock 7. Clock Pulse Generator CPG Crystal pulse generator, duty correction circuit Buses 8. Bus State Controller BSC Division of memory space, DRAM interface, refresh, wait state control, parity control 9. Direct Memory Access Controller DMAC Auto request, external request, on-chip peripheral module request, cycle steal mode, burst mode Timers 10. 16-Bit Integrated- Timer Pulse Unit ITU Waveform output mode, input capture function, counter clear function, buffer operation, PWM mode, complementary PWM mode, reset synchronized mode, synchronized operation, phase counting mode, compare match output mode 11. Programmable Timing Pattern Controller TPC Compare match output triggers, non-overlap operation 12. Watchdog Timer WDT Watchdog timer mode, interval timer mode Data Processing 13. Serial Communica- tion Interface SCI Asynchronous mode, clock synchronous mode, multiprocessor communication function |
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