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ATMEGA323L-4AI Datasheet(PDF) 10 Page - ATMEL Corporation |
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ATMEGA323L-4AI Datasheet(HTML) 10 Page - ATMEL Corporation |
10 / 247 page 10 ATmega323(L) 1457G–AVR–09/03 The 2K bytes data SRAM can be easily accessed through the five different addressing modes supported in the AVR architecture. The memory spaces in the AVR architecture are all linear and regular memory maps. A flexible interrupt module has its control registers in the I/O space with an additional Global Interrupt Enable bit in the Status Register. All interrupts have a separate Interrupt Vector in the Interrupt Vector table. The interrupts have priority in accordance with their Interrupt Vector position. The lower the Interrupt Vector address, the higher the priority. Figure 6. Memory Maps $0000 $3FFF Program Memory Application Flash Section Boot Flash Section |
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