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CLC401 Datasheet(PDF) 3 Page - Texas Instruments

Part # CLC401
Description  Fast Settling, Wideband High Gain Monolithic Op Amp
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CLC401 Datasheet(HTML) 3 Page - Texas Instruments

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OBSOLETE
CLC401
www.ti.com
SNOS849F – MAY 1999 – REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1) (2)
Supply Voltage (VCC)
±7V
IOUT
Output is short circuit protected to ground, but maximum reliability will
be maintained if IOUT does not exceed...
60mA
Common Mode Input Voltage
±VCC
Differential Input Voltage
5V
Junction Temperature Range
+150°C
Operating Temperature Range
−40°C to +85°C
Storage Temperature Range
−65°C to +150°C
Lead Solder Duration (+300°C)
10 sec
(1)
Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that
the devices should be operated at these limits. The ELECTRICAL CHARACTERISTICS table specifies conditions of device operation.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
OPERATING RATINGS
Thermal Resistance
Package
(
θJC)
(
θJA)
PDIP
70°C/W
125°C/W
SOIC
65°C/W
145°C/W
ELECTRICAL CHARACTERISTICS
(AV= +20, VCC = ±5V, RL = 100Ω, Rf =1.5kΩ; unless specified).
Symbol
Parameter
Conditions
Typ
Max/Min Ratings (1)
Units
Ambient Temperature
CLC401AJ
+25°C
−40°C
+25°C
+85°C
Frequency Domain Response
SSBW
−3dB Bandwidth
VOUT < 2VPP
150
>100
>100
>70
MHz
LSBW
VOUTt < 5VPP
100
>65
>65
>55
MHz
Gain Flatness
VOUT < 2VPP
GFPL
Peaking
<25MHz
0
<0.1
<0.1
<0.1
dB
GFPH
Peaking
>25MHz
0
<0.2
<0.2
<0.2
dB
GFR
Rolloff
<50MHz
0.2
<1.0
<1.0
<1.3
dB
LPD
Linear Phase Deviation
DC to 50MHz
0.2
<1.0
<1.0
<1.5
deg
Time Domain Response
TRS
Rise and Fall Time
2V Step
2.5
<3.5
<3.5
<5.0
ns
TRL
5V Step
5
<7.0
<7.0
<8.0
ns
TS
Settling Time to ±0.1%
2V Step
10
<15
<15
<15
ns
OS
Overshoot
2V Step
0
<10
<10
<10
%
SR
Slew Rate
1200
>800
>800
>700
V/µs
Distortion And Noise Response
HD2
2nd Harmonic Distortion
2VPP, 20MHz
−45
<
−35
<
−35
<
−35
dBc
HD3
3rd Harmonic Distortion
2VPP, 20MHz
−60
<
−50
<
−50
<
−45
dBc
Equivalent Input Noise
SNF
Noise Floor
>1MHz
−158
<
−155
<
−155
<
−154
dBm
(1Hz)
INV
Integrated Noise
1MHz to 150MHz
35
<50
<50
<55
µV
(1)
Max/min ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality
levels are determined from tested parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
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