S5L9286F01

DIGITAL SIGNAL PROCESSOR FOR CDP

10

FUNCTION DESCRIPTION

Micom Interface

The data inputted from Micom is inputted to MDAT and transfered by MCK, and the inputted signal is loaded to

control register by means of MLT. The timing chart is as follows.

Figure 1. MICOM data input timing chart

Table 1. Control register & data

NOTE: –;Reserved

Control

Regster

Comment

Address

D7~D4

Data

/ISTAT

Pin

D3

D2

D1

D0

CNTL-Z

Data Control

9X

ZCMT

-

NCLV

CRCQ

S0S1

CNTL-S

Frame Sync Protection

Attenuation Control

AX

FSEM

FSEL

WSEL

ATTM

LKFS

CNTL-L

Tracking Counter

Lower 4 Bits

BX

TRC3

TRC2

TRC1

TRC0

/COMPLETE

CNTL-U

Tracking Counter

Upper 4 Bits

CX

TRC7

TRC6

TRC5

TRC4

/COUNT

CNTL-W

CLV Control

DX

-

WB

WP

GAIN

FOK

CNTL-C

CLV-Mode

EX

CM3

CM2

CM1

CM0

/(Pw > 64)

CNTL-D

Double-speed

FX

0

0

DS1

DS2

TRCNT

Control

Regster

Comment

Address

D15-D8

Data

/ISTAT

Pin

D7

D6

D5

D4

D3

D2

D1

D0

CNTL-F

Function

Control

88XX

-

-

DEEM

ERA_

OFF

--

-

-

Hi-Z

CNTL-H

ESP,monitor

Pin Control

8DXX

-

-

-

-

-

-

ESP_

ON

DUMB

Hi-Z

MDAT

MCK

MLT

Register

(9X ~ FX)

Valid

D0

D1

D2

D3

D4

D5

D6

D7 <MSB>

Register

(88XX, 8DXX)

MDAT

MCK

MLT

Valid

D0

D1

D2

D3

D4

D15 <MSB>

D11

D12

D13

D14

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