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PE99151DIE Datasheet(PDF) 2 Page - Peregrine Semiconductor |
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PE99151DIE Datasheet(HTML) 2 Page - Peregrine Semiconductor |
2 / 15 page Page 2 of 15 ©2012–2015 Peregrine Semiconductor Corp. All rights reserved. Document No. DOC-50370-6 │ UltraCMOS® Power Management Solutions Product Specification PE99151 DIE Table 2. Electrical Specifications1 Temp (TA) = –55 °C to +125 °C, VIN = 4.6–6.0V, VOUT = 1.0–3.6V, unless otherwise noted Parameter Condition Min Typ Max Unit Synchronous Frequency Range, Fsw_range 0.1 5 MHz Maximum Cycle-Averaged RMS Output Current, Imax 2 A Supply Current (Shutdown), IDDSD SDb = GND, VIN = 5.5V 1.8 3.2 mA SDb = GND, VIN = 6.0V 3.1 5.5 Supply Current (No-load, 1 MHz async), IDD0 17.5 mA High Side On Resistance, Ron,hss Test current = 100 mA 97 160 mΩ Low Side On Resistance, Ron,lss Test current = 100 mA 113 190 mΩ Output Voltage Reference Voltage Accuracy, Vref 2 VIN = 5.0V, IOUT = Imax/2, –40≤TA ≤+85 °C, Fsw = 100 kHz–1 MHz –1.0 0 1.0 % VIN = 5.0V, IOUT = Imax/2, –55≤TA ≤+125 °C, Fsw = 100 kHz–1 MHz –1.5 0 1.5 Reference Voltage Line Regulation, Kvi (steady state) 2 4.6V ≤VIN ≤6.0V, IOUT = 1A, VOUT = 2.5V, Fsw = 1 MHz –0.2 0 0.2 % Reference Voltage Load Regulation, Kvo (steady state) 2 VIN = 5.0V, 500 mA ≤IOUT ≤1A, VOUT = 2.5V, Fsw = 1 MHz –0.25 0 0.25 % Internal Oscillator and SYNC Capture Oscillator Frequency, FOSC_FREQ SYNC = GND 320 530 700 kHz SYNC = Open or VIN 0.71 1 1.42 MHz Internal Oscillator Duty Cycle, FOSC_DC 46 54 % SYNC Lock Capture Frequency, Sync_lock 40 kHz External Sync Duty Cycle, SYNC_DC 40 60 % Internal Current Limit Max, ILIMXINT 2 VOUT = 1.0V, ISET = 3.0V, ICOMP = 0V, RSEL pin shorted to ground, not min-on-time limited 2 3 4 A Externally Set Max Current Limit Accuracy, ILIMXEXT 2 VOUT = 1.0V, RSET = 130Ω, ISET = 3.0V, ICOMP = 0V, RSEL = VIN, not min-on-time limited 2 3 4 % Max voltage across Rset, VMAXRSET 1.3 1.5 1.75 V Iout/Irset, GIref 2 IOUT set for 50% rated current 300 378 450 A/A ICOMP cap, CICOMP 2 110 pF Current compensation gain, ICOMP gain, GICOMP 2 2.3 3 4 A/V Current Limiting and Current Mode Control Loop Notes: 1. Wafer level screening is performed at +25 °C and +85 °C only. However, performance is guaranteed over the full operating temperature range based on a population of parts that were packaged and characterized at –55 °C and +125 °C. 2. Parameter not tested at wafer level due to high current limitations of test setup. |
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