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LM5107MA Datasheet(PDF) 3 Page - Texas Instruments

Part # LM5107MA
Description  1.4A Peak Half Bridge Gate Driver
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM5107MA Datasheet(HTML) 3 Page - Texas Instruments

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HI
LI
V
SS
HO
HS
LO
HB
V
DD
1
2
3
4
8
7
6
5
3
LM5107
www.ti.com
SNVS333E – NOVEMBER 2004 – REVISED MARCH 2016
Product Folder Links: LM5107
Submit Documentation Feedback
Copyright © 2004–2016, Texas Instruments Incorporated
(1)
For WSON package it is recommended that the exposed pad on the bottom of the LM5107 be soldered to ground plane on the PCB
board and the ground plane should extend out from underneath the package to improve heat dissipation.
5 Pin Configuration and Functions
D and NGT Packages
8-Pin SOIC, WSON
Top View
Pin Functions(1)
Pin #
Name
Description
Application Information
SOIC
WSON
1
1
VDD
Positive gate drive supply
Locally decouple to VSS using low ESR/ESL capacitor located as
close to IC as possible.
2
2
HI
High side control input
The LM5107 HI input is compatible with TTL input thresholds.
Unused HI input should be tied to ground and not left open
3
3
LI
Low side control input
The LM5107 LI input is compatible with TTL input thresholds. Unused
LI input should be tied to ground and not left open.
4
4
VSS
Ground reference
All signals are referenced to this ground.
5
5
LO
Low side gate driver output
Connect to the gate of the low side N-MOS device.
6
6
HS
High side source connection
Connect to the negative terminal of the bootstrap capacitor and to the
source of the high side N-MOS device.
7
7
HO
High side gate driver output
Connect to the gate of the low side N-MOS device.
8
8
HB
High side gate driver positive
supply rail
Connect the positive terminal of the bootstrap capacitor to HB and
the negative terminal of the bootstrap capacitor to HS. The bootstrap
capacitor should be placed as close to IC as possible.
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test
conditions, see the Electrical Characteristics .
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3)
In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally
not exceed -1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated
voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD - 15V. For example, if VDD
= 10V, the negative transients at HS must not exceed -5V.
6 Specifications
6.1 Absolute Maximum Ratings
See
(1) (2)
VDD to VSS
-0.3V to 18V
HB to HS
−0.3V to 18V
LI or HI to VSS
−0.3V to VDD +0.3V
LO to VSS
−0.3V to VDD +0.3V
HO to VSS
VHS −0.3V to VHB +0.3V
HS to VSS
(3)
−5V to 100V
HB to VSS
118V
Junction Temperature
-40°C to +150°C
Storage Temperature Range
−55°C to +150°C


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