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TPS659113A2ZRC Datasheet(PDF) 9 Page - Texas Instruments |
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TPS659113A2ZRC Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 119 page  9 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 www.ti.com SWCS049Q – JUNE 2010 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Pin Configuration and Functions Copyright © 2010–2016, Texas Instruments Incorporated Table 4-1. Pin Functions NAME BGA PIN SUPPLIES TYPE I/O DESCRIPTION PU / PD AGND D6, E5, E6, F5, G4, H5, H6, J3, J4, J6, K3 AGND Power I/O Analog ground No AGND2 M8, N8 AGND Power I/O Analog ground No BOOT1 J5 VRTC, DGND Digital I Power-up sequence selection No CLK32KOUT F4 VDDIO, DGND Digital O 32-kHz clock output PD disable in ACTIVE or SLEEP state DGND A1, B1, B2 DGND Power I/O Digital ground No DRVH A3 VBST, GNDC Analog O VDDCtrl, High-side FET driver output DRVL A6 V5IN, GNDC Analog O VDDCtrl, FET driver output EN D5 VCC7, GNDC Analog I Internal functional pin, leave floating EN1 M7 VDDIO, DGND Digital I/O Enable for supplies or voltage scaling dedicated I2C clock External PU EN2 M6 VDDIO, DGND Digital I/O Enable for supplies or voltage scaling dedicated I2C data External PU GNDC A7, A8 GNDC Power I/O VDDCtrl, Controller ground GNDIO J7, J8 VCCIO, GNDIO Power I/O VIO DCDC Power ground No GND1 C1, C2, D3 VCC1, GND1 Power I/O VDD1 DCDC Power ground No GND2 J1, J2 VCC2, GND2 Power I/O VDD2 DCDC Power ground No GPIO0 L5 VCC7, DGND Digital I/O GPIO, push-pull or OD as output OD: external PU GPIO1 F6 VRTC, DGND Digital I/O, OD GPIO or LED1 output OD: External PU GPIO2 L2 VRTC, DGND Digital I/O, OD GPIO or DCDC clock synchronization OD: External PU GPIO3 B7 VRTC, DGND Digital I/O, OD GPIO or LED2 output OD: External PU GPIO4 H7 VRTC, DGND Digital I/O, OD GPIO OD: External PU GPIO5 G6 VRTC, DGND Digital I/O, OD GPIO OD: external PU GPIO6 G3 VRTC, DGND Digital I/O; OD GPIO OD: External PU GPIO7 L4 VRTC, DGND Digital I/O, OD GPIO OD: External PU GPIO8 K5 VRTC, DGND Digital I/O, OD GPIO OD: External PU HDRST L6 VRTC, DGND Digital I Cold reset PD INT1 L3 VDDIO, DGND Digital O Interrupt flag No LDO1 N6 VCC6, REFGND Power O LDO Regulator output No LDO2 N4 VCC6, REFGND Power O LDO Regulator output No LDO3 E7 VCC5, REFGND Power O LDO Regulator output PD 5 µA LDO4 C8 VCC5, REFGND Power O LDO Regulator output PD 5 µA LDO5 K1 VCC4, REFGND Power O LDO Regulator output PD 5 µA LDO6 M2 VCC3, REFGND Power O LDO Regulator output PD 5 µA LDO7 M3 VCC3, REFGND Power O LDO Regulator output PD 5 µA LDO8 M1 VCC3, REFGND Power O LDO Regulator output PD 5 µA NRESPWRON H4 VDDIO, DGND Digital O Power off reset PD active during device OFF state NRESPWRON2 C7 VRTC, DGND Digital O, OD Second NRESPWRON output PD active during device OFF state. External pullup in ACTIVE state. OSC32KIN F8 VRTC, REFGND Analog I 32-kHz crystal oscillator No OSC32KOUT F7 VRTC, REFGND Analog I 32-kHz crystal oscillator No |
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