ERROR

AMPLIFIER

Boot

Charge

Current

Sense

Slope

Compensation

Maximum

Clamp

Voltage

Reference

Overload

Recovery

VSENSE

COMP

BOOT

GND

Thermal

Hiccup

EN

Enable

Comparator

Shutdown

Logic

Enable

Threshold

EXPOSED THERMAL PAD

Power Stage

& Deadtime

Control

Logic

OV

Minimum Clamp

Pulse Skip

VIN

HS MOSFET

Current

Comparator

Current

Sense

Regulator

VIN

Boot

UVLO

SW

Hiccup

Shutdown

Hiccup

Shutdown

LS MOSFET

Current Limit

Oscillator

UVLO

UV

Logic

PGOOD

Shutdown

10

TPS54334

SLUSC26A – MAY 2015 – REVISED FEBRUARY 2016

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Product Folder Links: TPS54334

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Copyright © 2015–2016, Texas Instruments Incorporated

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Fixed Frequency PWM Control

The device uses a fixed frequency, peak current mode control. The output voltage is compared through external

resistors on the VSENSE pin to an internal voltage reference by an error amplifier which drives the COMP pin.

An internal oscillator initiates the turn on of the high side power switch. The error amplifier output is compared to

the high side power switch current. When the power switch current reaches the COMP voltage level the high side

power switch is turned off and the low side power switch is turned on. The COMP pin voltage increases and

decreases as the output current increases and decreases. The device implements a current limit by clamping the

COMP pin voltage to a maximum level and also implements a minimum clamp for improved transient response

performance.

7.3.2 Light Load Operation

The device monitors the peak switch current of the high-side MOSFET. Once the peak switch current is lower

than typically 0.5A, the device stops switching to boost the efficiency until the peak switch current is again higher

than typically 0.5A.