2

2

=

IPP

Lo(RMS)

O

1

+

12

I

I

I

lpp

=

+

Ipeak

O

2

I

I

I

V

V

V

IN(max)

OUT

OUT

=

x

IPP

V

L

x

IN(max)

O

SW

-

I

f

F

=

P

OUT

OUT

1

2

L

x C

p

V

= 0.765 x

OUT

R1

1 +

R2

æ

ö÷

ç

÷

ç

÷÷

çè

ø

TPS54327

www.ti.com

SLVSAG1C – DECEMBER 2010 – REVISED DECEMBER 2015

8.2.2.1 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the VFB pin. TI recommends using 1%

To improve efficiency at very light loads consider using larger value resistors, too high of resistance will be more

susceptible to noise and voltage errors from the VFB input current will be more noticeable.

(2)

8.2.2.2 Output Filter Selection

The output filter used with the TPS54327 is an LC circuit. This LC filter has double pole at:

(3)

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal

gain of the TPS54327. The low-frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls

off at a -40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high-frequency zero that

reduces the gain roll off to -20 dB per decade and increases the phase to 90 degrees one decade above the

zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole

of Equation 3 is located below the high-frequency zero but close enough that the phase boost provided be the

high-frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the

values recommended in Table 2

Table 2. Recommended Component Values

OUTPUT VOLTAGE (V)

R1 (k

Ω)

R2 (k

Ω)

C4 (pF)

L1 (µH)

C8 + C9 (µF)

1

6.81

22.1

1.5

22 to 68

1.05

8.25

22.1

1.5

22 to 68

1.2

12.7

22.1

1.5

22 to 68

1.8

30.1

22.1

5 - 22

2.2

22 to 68

2.5

49.9

22.1

5 - 22

2.2

22 to 68

3.3

73.2

22.1

5 - 22

2.2

22 to 68

5

124

22.1

5 - 22

3.3

22 to 68

6.5

165

22.1

5 - 22

3.3

22 to 68

Because the DC gain is dependent on the output voltage, the required inductor value will increase as the output

voltage increases. For higher output voltages above 1.8 V, additional phase boost can be achieved by adding a

feed forward capacitor (C4) in parallel with R1

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 4,

Equation 5 and Equation 6. The inductor saturation current rating must be greater than the calculated peak

current and the RMS or heating current rating must be greater than the calculated RMS current. Use 700 kHz for

current of Equation 6.

(4)

(5)

(6)

For this design example, the calculated peak current is 3.47 A and the calculated RMS current is 3.01 A. The

inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating of

11 A.

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