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TB62269FTG Datasheet(PDF) 11 Page - Toshiba Semiconductor |
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TB62269FTG Datasheet(HTML) 11 Page - Toshiba Semiconductor |
11 / 27 page TB62269FTG 11 2014-3-18 Electrical Characteristics 2 (Ta = 25°C, VM = 24V, unless otherwise specified) Characteristics Symbol Test Condition Min Typ. Max Unit Vref input current Iref Vref = 3.0 V - 0 1.0 μA Vref decay rate Vref (GAIN) Vref = 2.0 V 1/4.8 1/5.0 1/5.2 - TSD threshold (Note 1)) TjTSD - 140 150 170 °C VM recovery voltage VMR Modes other than STANDBY MODE 7.0 8.0 9.0 V Overcurrent trip threshold(Note 2) ISD - 2.0 3.0 4.0 A Power-supply voltage for internal circuit operation VCC ICC=5.0mA 4.75 5.00 5.25 V Note 1: Thermal shutdown (TSD) circuitry When the junction temperature of the device reaches the threshold, the TSD circuitry is tripped, causing the internal reset circuitry to turn off the output transistors.The TSD circuitry is tripped at a temperature between 140°C (min) and 170°C (max). Once tripped, the TSD circuitry keeps the output transistors off until the TSD circuitry is released. The TSD status is released once the TB62269FTG is rebooted or all the D_MODEpins(D_MODE0,1,2) are switched to Low(set to STANDBY status). The TSD circuitry does not necessarily guarantee the complete safety of the device; therefore do not use the TSD circuitry actively. Note 2: Overcurrent shutdown (ISD) circuitry When the output current reaches the threshold, the ISD circuitry is tripped, causing the internal reset circuitry to turn off the output transistors.To prevent the ISD circuitry from being tripped owing to switching noise, it has a masking time of four CR oscillator cycles. Once tripped, it takes a maximum of four cycles to exit ISD mode and resume normal operation.The ISD circuitry remains active until all the D_MODE(DMODE_0,1,2) pins are switched to Low or the TB62269FTG is rebooted. The TB62269FTG remains in Standby mode while in ISD mode. Note 3: When the power supply voltage (VCC) for operating internal circuit is divided by the external resistor and used as Vref input voltage, the accuracy of the output current setting value becomes ±8% together with the VCC output voltage accuracy and the Vref decay ratio accuracy. Note 4: Even when the logic input signal is input under the condition that the VM voltage is not supplied, the electromotive force and the leakage current by the signal input are not generated. However, before VM is rebooted, logic input signal should be controlled not to let the motor operating by rebooting VM. Back-EMF While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the motor current is fed back to the power supply owing to the effect of the motor back-EMF. If the power supply does not have enough sink capability, the power supply and output pins of the device might rise above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor characteristics. It must be fully verified that there is no risk that the TB62269FTG or other components will be damaged or fail owing to the motor back-EMF. Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD) The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an output short circuit; they do not necessarily guarantee complete IC safety. If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device may be damaged owing to an output short circuit. The ISD circuit is only intended to provide temporary protection against an output short circuit. If such a condition persists for a long time, the device may be damaged owing to overstress. Overcurrent conditions must be removed immediately by external hardware. IC Mounting Do not insert devices in the wrong orientation or incorrectly. Otherwise, it may cause device breakdown, damage and/or deterioration. |
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