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SP6201EM5 Datasheet(PDF) 6 Page - Sipex Corporation |
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SP6201EM5 Datasheet(HTML) 6 Page - Sipex Corporation |
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6 / 17 page  6 Date:5/25/04 SP6200/6201 100/200mA CMOS LDO Regulator © Copyright 2004 Sipex Corporation General Overview The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent cur- rent which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guar- antee stability with a 1 µF ceramic output ca- pacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High fre- quency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. Thus, overall system accuracy is maintained under all DC and AC conditions. Enable feature is pro- vided on all versions. A Vout good indicator (RSN pin) is provided in all the fixed output voltage devices. An adjustable output version is also available. Current Limit and Thermal pro- tection is provided internally and is well con- trolled. Architecture The SP6200 and SP6201 are only different in their current limit threshold. The SP6200 has a current limit of 140mA, while the SP6201 cur- rent limit is 420mA. The SP6201 can provide pulsed load current of 300mA. The LDOs have a two stage amplifier which handles an ex- tremely wide load range (10 µA to 300mA) and guarantees stability with a 1 µF ceramic load capacitor. The LDO amplifier has excellent gain and thus touts PSRR performance not found in other CMOS LDOs. The amplifier guarantees no overshoot on power up or while enabled through the EN pin. The amplifier also contains an active pull down, so that when the load is removed quickly the output voltage transient is minimal; thus output deviation due to load tran- sient is small and fairly well matched when connecting and disconnecting the load. An accurate 1.250V bandgap reference is bootstrapped to the output in fixed output ver- sions of 2.7V and higher. This increases both the low frequency and high frequency PSRR. The adjustable version also has the bandgap refer- ence bootstrapped to the output, thus the lowest externally programmable output voltage is 2.7V. The 2.5V fixed output version has the bandgap always connected to the Vin pin. Unlike many LDOs, the bandgap reference is not brought out for filtering by the user. This tradeoff was maid to maintain good PSRR at high frequency (PSRR can be degraded in a system due to switching noise coupling into this pin). Also, often leak- ages of the bypass capacitor or other compo- nents cause an error on this high impedance bandgap node. Thus, this tradeoff has been made with "ease of use" in mind. Protection Current limit behavior is very well controlled, providing less than 10% variation in the current limit threshold over the entire temperature range for both SP6200 and SP6201. The SP6200 has a current limit of 140mA, while the SP6201 has a current limit of 420mA. Thermal shutdown ac- tivates at 162 °C and deactivates at 147°C. Ther- mal shutdown is very repeatable with only a 2 to 3 degree variation from device to device. Ther- mal shutdown changes by only 1 to 2 degrees with Vin change from 4V to 7V. Enable (Shutdown Not) Input The LDOs are turned off by pulling the EN pin low and turned on by pulling it high. If it is not necessary to shut down the LDO, the EN (pin 3) should be tied to IN (pin 1) to keep the regulator output on at all time. The enable threshold is 0.9V and does not change more than 100mV over the entire temperature and Vin voltage range. The lot to lot variations in Enable Thresh- old is also within 100mV. Shutdown current is guaranteed to be <1uA without requiring the user to pull enable all the way to 0V. Standard TTL or CMOS levels will transition the device from totally on to totally off. THEORY OF OPERATION |
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