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SPX2815R Datasheet(PDF) 4 Page - Sipex Corporation

Part # SPX2815R
Description  1.5A Low Dropout Voltage Regulator
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Manufacturer  SIPEX [Sipex Corporation]
Direct Link  http://www.sipex.com
Logo SIPEX - Sipex Corporation

SPX2815R Datasheet(HTML) 4 Page - Sipex Corporation

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Date: 5/17/04
SPX2815 1.5A Low Dropout Voltage Regulator
© Copyright 2004 Sipex Corporation
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Frequency, Hz
Figure 5. Ripple Rejection; Vin=3.3V, Vout=1.8V (adj.),
Iload=200mA
Figure 6. Current Source
LOAD
ADJ
SPX2815
V
IN
C
1
OUT
IN
4.7µF
C
2
I
OUT
R
1
V
REF
R
1
I
OUT =
+
V
OUT
Ripple Rejection
Ripple rejection can be improved by adding a
capacitor between the ADJ pin and ground as
shown in Figure 8. When ADJ pin bypassing
is used, the value of the output capacitor
required increases to its maximum. If the ADJ
pin is not bypassed, the value of the output
capacitor can be lowered to 22
µF for an
electrolytic aluminum capacitor or 10
µF for a
solid tantalum capacitor (Fig 7).
However the value of the ADJ-bypass capaci-
tor should be chosen with respect to the
following equation:
C = 1 / ( 6.28 * F
R * R1 )
Where
C = value of the capacitor in Farads
(select an equal or larger standard value),
F
R = ripple frequency in Hz,
R
1 = value of resistor R1 in Ohms.
If an ADJ-bypass capacitor is used, the
amplitude of the output ripple will be indepen-
dent of the output voltage. If an ADJ-bypass
capacitor is not used, the output ripple will be
proportional to the ratio of the output voltage
to the reference voltage:
M = V
OUT / VREF
Where M = multiplier for the ripple seen when
the ADJ pin is optimally bypassed.
V
REF =1.25V
Ripple rejection for the adjustable version is
shown in Figure 5.
Output Voltage
The output of the adjustable regulator can be
set to any voltage between 1.25V and 15V.
The value of V
OUT can be quickly approxi-
mated using the formula
V
OUT=1.25 *(R1 + R2)/R1
A small correction to this formula is required
depending on the values of resistors R
1 and R2,
since the adjustable pin current (approx
50
µA) flows through R
2. When IADJ is taken
into account, the formula becomes
V
OUT = VREF(1+ (R2/R1)) + IADJ * R2
where
V
REF=1.25V
Layout Considerations
Parasitic line resistance can degrade load
regulation. In order to avoid this, connect R
1
directly to V
OUT as illustrated in Figure 13.
For the same reason, R
2 should be connected
to the negative side of the load.
APPLICATION INFORMATION: Continued


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