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TLC5940PWPR Datasheet(PDF) 4 Page - Texas Instruments |
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TLC5940PWPR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 38 page TLC5940 SLVS515D – DECEMBER 2004 – REVISED NOVEMBER 2015 www.ti.com Pin Functions PIN TYPE DESCRIPTION NAME DIP NO. PWP NO. RHB NO. Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. BLANK 23 2 31 I GS counter is also reset. When BLANK = L, OUTn are controlled by grayscale PWM control. Switch DC data input. When DCPRG = L, DC is connected to EEPROM. When DCPRG = H, DC is connected to the DC register. DCPRG 19 26 25 I DCPRG also controls EEPROM writing, when VPRG = V(PRG). EEPROM data = 3 Fh (default) GND 22 1 30 G Ground GSCLK 18 25 24 I Reference clock for grayscale PWM control IREF 20 27 26 I Reference current terminal — — 12 — — 13 NC — No connection — — 28 — — 29 OUT0 28 7 4 O Constant current output OUT1 1 8 5 O Constant current output OUT2 2 9 6 O Constant current output OUT3 3 10 7 O Constant current output OUT4 4 11 8 O Constant current output OUT5 5 12 9 O Constant current output OUT6 6 13 10 O Constant current output OUT7 7 14 11 O Constant current output OUT8 8 15 14 O Constant current output OUT9 9 16 15 O Constant current output OUT10 10 17 16 O Constant current output OUT11 11 18 17 O Constant current output OUT12 12 19 18 O Constant current output OUT13 13 20 19 O Constant current output OUT14 14 21 20 O Constant current output OUT15 15 22 21 O Constant current output SCLK 25 4 1 I Serial data shift clock SIN 26 5 2 I Serial data input SOUT 17 24 23 O Serial data output VCC 21 28 27 I Power supply voltage Multifunction input pin. When VPRG = GND, the device is in GS mode. When VPRG = VCC, the device is in DC mode. When VPRG = V(VPRG), VPRG 27 6 3 I DC register data can programmed into DC EEPROM with DCPRG=HIGH. EEPROM data = 3 Fh (default) Error output. XERR is an open-drain terminal. XERR goes L when LOD XERR 16 23 22 O or TEF is detected. Level triggered latch signal. When XLAT = high, the TLC5940 writes data from the input shift register to either GS register (VPRG = low) or XLAT 24 3 32 I DC register (VPRG = high). When XLAT = low, the data in GS or DC register is held constant. 4 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: TLC5940 |
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