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PI6C48533-01LEX Datasheet(PDF) 2 Page - Pericom Semiconductor Corporation |
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PI6C48533-01LEX Datasheet(HTML) 2 Page - Pericom Semiconductor Corporation |
2 / 7 page PI6C48533-01 3.3V Low Skew 1-to-4 Differential/LVCMOS to LVPECL Fanout Buffer 2 Rev B 6/23/2015 Pin Description Name Pin # Type Description VEE 1 P ConnecttoNegativepowersupply CLK_EN 2 I_PU Synchronizingclockenable.Whenhigh,clockoutputsfollowclockinput.Whenlow,Qx outputsareforcedlow,nQxoutputsareforcedhigh.LVCMOS/LVTTLlevelwith50KΩpull-up. CLK_ SEL 3 I_PD Clockselectinput.Whenhigh,selectsPCLKinput.Whenlow,selectsCLKinput.LVCMOS/ LVTTLlevelwith50KΩpull-down. CLK 4 I_PD Non-invertingdifferentialclockinput nCLK 5 I_PU Invertingdifferentialclockinput PCLK 6 I_PD Non-invertingdifferentialclockinput nPCLK 7 I_PU Invertingdifferentialclockinput NC 8,9 Notconnected VCC 10,13, 18 P Connectto3.3V. nQ3, Q3 11, 12 O Differentialoutputpair,LVPECLinterfacelevel. nQ2, Q2 14, 15 O Differentialoutputpair,LVPECLinterfacelevel. nQ1, Q1 16, 17 O Differentialoutputpair,LVPECLinterfacelevel. nQ0, Q0 19, 20 O Differentialoutputpair,LVPECLinterfacelevel. Note: 1. I=Input,O=Output,P=Powersupplyconnection,I_PD=Inputwithpulldown,I_PU=Inputwithpullup Pin Characteristics Symbol Parameter Conditions Min. Typ. Max. Units CIN InputCapacitance 4 pF R_pullup InputPullupResistance 50 KΩ R_pulldown InputPulldownResistance 50 Control Input Function Table(1) Inputs Outputs CLK_EN CLK_SEL Selected Source Q0:Q3 nQ0:nQ3 0 0 CLK,nCLK Diasbled:Low Diasbled:High 0 1 PCLK,nPCLK Disabled:Low Disabled:High 1 0 CLK,nCLK Enabled Enabled 1 1 PCLK,nPCLK Enabled Enabled Note: 1. AfterCLK_ENswitches,theclockoutputsaredisabledorenabledfollowingarisingandfallinginputclockedgeasshowbelow. 15-0084 |
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