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TPS3710DSER Datasheet(PDF) 6 Page - Texas Instruments |
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TPS3710DSER Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 24 page  VDD SENSE OUT VIT+ V HYS t pd(LH) t pd(LH) t pd(HL) VIT± t d(start) V(POR) TPS3710 SBVS271 – OCTOBER 2015 www.ti.com 6.6 Timing Requirements over operating temperature range (unless otherwise noted) MIN NOM MAX UNIT VDD = 5 V, 10-mV input overdrive, tpd(HL) High-to-low propagation delay (1) RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV, 18 µs see Figure 1 VDD = 5 V, 10-mV input overdrive, tpd(LH) Low-to-high propagation delay (1) RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV, 29 µs see Figure 1 td(start) Start-up delay (2) 150 µs (1) High-to-low and low-to-high refers to the transition at the input pin (SENSE). (2) During power on, VDD must exceed 1.8 V for at least 150 µs before the output is in a correct state. 6.7 Switching Characteristics over operating temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDD = 5 V, 10-mV input overdrive, tr Output rise time 2.2 µs RP = 10 kΩ, VO = (0.1 to 0.9) × VDD VDD = 5 V, 10-mV input overdrive, tf Output fall time 0.22 µs RP = 10 kΩ, VO = (0.1 to 0.9) × VDD Figure 1. Timing Diagram 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3710 |
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