7

Receiver

30 kHz-40 GHz

XD1008-BD

Rev. V1

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Layout Dimensions

1

0.0

2.35

0.83

0.55

0.42

0.17

0.0

1.05

0.24

2

3

4

5

6

7

8

9

11

1.27

0.73

0.49

0.68

10

0.43

Pin1: RF IN

Pin2: VG2, not connected for basic application, but can be

used for gain control (VG2 = 2V to -2V)

Pin3: VG3, not connected for basic application, can be used

for gain peaking

Pin4: VD Aux, not connected, but can be used for capacitive

bypass for operation at frequencies lower than 2 GHz

Pin5: VD – detector bias, the same as VD for the amplifier

Pin6: VDR – bias voltage for reference diode (see

application note)

Pin7: VDREF – detector reference (see application note)

Pin8: VDET – detector diode (see application note)

Pin9: RFOUT

Pin10: VG4, not connected

Pin11: VG1, first gate bias typically bias at -2.5V to get -0.5V

on the device.

Bonding Diagram