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TPS24751RUVR Datasheet(PDF) 7 Page - Texas Instruments

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Part # TPS24751RUVR
Description  12A eFuse Circuit Protector
Download  46 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS24751RUVR Datasheet(HTML) 7 Page - Texas Instruments

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TPS24750, TPS24751
www.ti.com
SLVSC87A – OCTOBER 2013 – REVISED SEPTEMBER 2015
Electrical Characteristics (continued)
–40°C
≤ TJ ≤ 125°C, VCC = 12 V, VEN = 3 V, RSET = 191 Ω, RIMON = 5 kΩ, and RPROG = 50 kΩ to GND. All voltages referenced
to GND, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
NOM
MAX
UNIT
Lower threshold voltage
0.33
0.35
0.37
V
Timer activation voltage
Raise GATE until ITIMER sinking, measure V(GATE – VCC), VVCC = 12 V
5
5.8
7
V
Retry Duty Cycle
During Over Current and Short Circuit Conditions (TPS24751 only)
4%
IMON
Circuit breaker threshold
650
675
696
mV
At TJ = 25°C
-1
0
1
mV
Input referred offset of servo
amplifier
TJ from -40°C to 125°C
-1.5
0
1.5
mV
SET
Input referred offset of servo
Measure SET to SENSE
–1.5
0
1.5
mV
amplifier
GATE
Output voltage
VOUT = 12 V
23.5
25.7
28
V
Clamp voltage
Inject 10 µA into GATE, measure V(GATE – VCC)
12
13.9
15.5
V
Sourcing current
VGATE = 12 V
20
30
40
µA
Fast turnoff, VGATE = 14 V
0.4
1
1.4
A
Sinking current
Sustained, VGATE = 4 V to 23 V
6
11
20
mA
In inrush current limit, VGATE = 4 V to 23 V
20
30
40
µA
Pulldown resistance
Thermal shutdown or VEN = 0 V
14
20
26
k
Ω
Fast turnoff duration
8
13
18
µs
Turn on delay
VVCC rising to GATE sourcing, tprr50-50, See Figure 29
100
375
µs
SENSE
Input bias current
VSENSE = 12 V, sinking current
30
40
µA
Current limit threshold
VOUT = 12 V
22.5
25
27.5
mV
VDRAIN-OUT = 8 V, RPROG = 100 kΩ
4
VDRAIN-OUT = 8 V, RPROG = 50 kΩ
6.6
8
9.6
Power limit threshold
mV
VDRAIN-OUT = 5.37 V, RPROG = 50 kΩ
10
12
14
VDRAIN-OUT = 10.3 V, RPROG = 25 kΩ
10
12.5
15
Fast-trip threshold
52
60
68
mV
Fast-turnoff delay(1)
V(VCC – SENSE) = 80 mV, CGATE = 0 pF, tprf50–50, See Figure 30
200
ns
OTSD
Threshold, rising
Temperature referenced to PAD1 of the device. See(2)
130
140
°C
Hysteresis(1)
10
°C
(2)
The temperature difference between PAD1 and PAD2 must be minimized. See the SOA curve Figure 27 and DESIGN EXAMPLE for
temperature limited design.
Copyright © 2013–2015, Texas Instruments Incorporated
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Product Folder Links: TPS24750 TPS24751


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