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TMS320C6654 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C6654 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 235 page  TMS320C6654 SPRS841B – MARCH 2012 – REVISED APRIL 2015 www.ti.com Table of Contents 1 C6654 Features and Description ..................... 1 7.4 Power Supply to Peripheral I/O Mapping ......... 110 1.1 Features .............................................. 1 8 Peripheral Information and Electrical Specifications ......................................... 111 1.2 KeyStone Architecture ................................ 1 8.1 Recommended Clock and Control Signal Transition 1.3 Device Description ................................... 2 Behavior ............................................ 111 1.4 Functional Block Diagram ............................ 3 8.2 Power Supplies .................................... 111 2 Revision History ........................................ 5 8.3 Power Sleep Controller (PSC) ..................... 119 3 Device Overview ......................................... 6 8.4 Reset Controller .................................... 123 3.1 Device Characteristics ................................ 6 8.5 Main PLL and PLL Controller ...................... 129 3.2 DSP Core Description ................................ 7 8.6 DDR3 PLL .......................................... 146 3.3 Memory Map Summary ............................. 10 8.7 Enhanced Direct Memory Access (EDMA3) 3.4 Boot Sequence ...................................... 14 Controller ........................................... 149 3.5 Boot Modes Supported and PLL Settings ........... 15 8.8 Interrupts ........................................... 153 3.6 PLL Boot Configuration Settings .................... 35 8.9 Memory Protection Unit (MPU) .................... 174 3.7 Second-Level Bootloaders .......................... 35 8.10 DDR3 Memory Controller .......................... 189 3.8 Terminals ............................................ 36 8.11 I2C Peripheral ...................................... 190 3.9 Terminal Functions .................................. 41 8.12 SPI Peripheral ...................................... 195 4 Device Configuration .................................. 63 8.13 UART Peripheral ................................... 198 4.1 Device Configuration at Device Reset .............. 63 8.14 PCIe Peripheral .................................... 199 4.2 Peripheral Selection After Device Reset ............ 64 8.15 EMIF16 Peripheral ................................. 200 4.3 Device State Control Registers ..................... 64 8.16 Ethernet Media Access Controller (EMAC) ........ 203 4.4 Pullup/Pulldown Resistors .......................... 91 8.17 Management Data Input/Output (MDIO) ........... 209 5 System Interconnect ................................... 92 8.18 Timers .............................................. 211 5.1 Internal Buses and Switch Fabrics .................. 92 8.19 General-Purpose Input/Output (GPIO) ............. 212 5.2 Switch Fabric Connections Matrix .................. 92 8.20 Semaphore2 ....................................... 213 5.3 TeraNet Switch Fabric Connections ................ 95 8.21 Multichannel Buffered Serial Port (McBSP) ........ 213 5.4 Bus Priorities ........................................ 98 8.22 Universal Parallel Port (uPP) ...................... 218 6 C66x CorePac .......................................... 100 8.23 Emulation Features and Capability ................ 223 6.1 Memory Architecture ............................... 101 9 Device and Documentation Support .............. 227 6.2 Memory Protection ................................. 104 9.1 Device Support ..................................... 227 6.3 Bandwidth Management ........................... 105 9.2 Documentation Support ............................ 228 6.4 Power-Down Control ............................... 105 9.3 Trademarks ........................................ 229 6.5 C66x CorePac Revision ........................... 106 9.4 Electrostatic Discharge Caution ................... 229 6.6 C66x CorePac Register Descriptions .............. 106 9.5 Glossary ............................................ 229 7 Device Operating Conditions ....................... 107 10 Mechanical Data ...................................... 230 7.1 Absolute Maximum Ratings ........................ 107 10.1 Thermal Data ...................................... 230 7.2 Recommended Operating Conditions ............. 108 10.2 Packaging Information ............................. 230 7.3 Electrical Characteristics ........................... 109 4 Table of Contents Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback |
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