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TMS320C5545AZQW10R Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C5545AZQW10R Datasheet(HTML) 4 Page - Texas Instruments |
4 / 128 page PLL/Clock Generator Power Management Pin Multiplexing JTAG Interface 64KB DARAM 128KB ROM Switched Central Resource (SCR) Input Clocks C55x DSP CPU DSP System Peripherals I S (x4) 2 I C 2 SPI UART Serial Interfaces DMA (x4) Interconnect Program/Data Storage eMMC/SD SDHC (x2) 256KB SARAM FFT Hardware Accelerator USB 2.0 PHY (HS) [DEVICE] Connectivity 10-Bit SAR ADC Application Specific LCD Bridge Display GP Timer (x2) RTC GP Timer or WD System USB_LDO DSP_LDO ANA_LDO 4 TMS320C5545 SPRS853C – JULY 2013 – REVISED MARCH 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TMS320C5545 Device Overview Copyright © 2013–2016, Texas Instruments Incorporated 1.4 Functional Block Diagram Figure 1-1 shows the functional block diagram of the devices. Figure 1-1. Functional Block Diagram |
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