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IS45R16320F Datasheet(PDF) 8 Page - Integrated Silicon Solution, Inc

Part # IS45R16320F
Description  8K refresh cycles every 64 ms
Download  68 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS45R16320F Datasheet(HTML) 8 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00A
11/5/2013
IS42/45R86400F/16320F/32160F, IS42/45S86400F/16320F/32160F
PIN FUNCTIONS
Symbol
Type
Function (In Detail)
A0-A12
Input Pin
AddressInputs:A0-A12aresampledduringtheACTIVEcommand(row-address
A0-A12)andREAD/WRITEcommand(columnaddressA0-A9,A11(x8);A0-A9
(x16); A0-A8 (x32); with A10 defining auto precharge) to select one location out of
thememoryarrayintherespectivebank.A10issampledduringaPRECHARGE
commandtodetermineifallbanksaretobeprecharged(A10HIGH)orbank
selectedbyBA0,BA1(LOW).Theaddressinputsalsoprovidetheop-codeduringa
LOADMODEREGISTERcommand.
BA0,BA1
Input Pin
BankSelectAddress:BA0andBA1defineswhichbanktheACTIVE,READ,WRITE
orPRECHARGEcommandisbeingapplied.
CAS
Input Pin
CAS
, in conjunction with the RAS and WE, forms the device command. See the
"CommandTruthTable"fordetailsondevicecommands.
CKE
Input Pin
TheCKEinputdetermineswhethertheCLKinputisenabled.Thenextrisingedge
oftheCLKsignalwillbevalidwhenisCKEHIGHandinvalidwhenLOW.WhenCKE
isLOW,thedevicewillbeineitherpower-downmode,clocksuspendmode,orself
refresh mode. CKEisan asynchronous input.
CLK
Input Pin
CLKisthemasterclockinputforthisdevice.ExceptforCKE,allinputstothisdevice
are acquired in synchronization with the rising edge of this pin.
CS
Input Pin
TheCS input determines whether command input is enabled within the device.
Command input is enabled when CSisLOW,anddisabledwithCSisHIGH.The
device remains in the previous state when CSisHIGH.
DQM: x8
Input Pin
DQxpinscontrolthebytesoftheI/Obuffers.Forexamplewithx16,inreadmode,
DQML,DQMH:x16
DQMLandDQMHcontroltheoutputbuffer.WhenDQMLorDQMHisLOW,the
DQM0-DQM3:x32
correspondingbufferbyteisenabled,andwhenHIGH,disabled.Theoutputsgoto
theHIGHimpedancestatewhenDQML/DQMHisHIGH.Thisfunctioncorresponds
to OEinconventionalDRAMs.Inwritemode,DQMLandDQMHcontroltheinput
buffer.WhenDQMLorDQMHisLOW,thecorrespondingbufferbyteisenabled,
anddatacanbewrittentothedevice.WhenDQMLorDQMHisHIGH,inputdatais
masked and cannot be written to the device.
DQ0-DQ7:x8
Input/Output
DataontheDataBusislatchedonDQpinsduringWritecommands,andbufferedfor
DQ0-DQ15: x16
output after Read commands.
DQ0-DQ31: x32
RAS
Input Pin
RAS
, in conjunction with CAS and WE, forms the device command. See the "Com-
mandTruthTable"itemfordetailsondevicecommands.
WE
Input Pin
WE
, in conjunction with RAS and CAS, forms the device command. See the "Com-
mandTruthTable"itemfordetailsondevicecommands.
Vddq
Power Supply PinVddq is the output buffer power supply.
Vdd
Power Supply PinVdd is the device internal power supply.
Vssq
Power Supply PinVssq is the output buffer ground.
Vss
Power Supply PinVss is the device internal ground.


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