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IS42S32800J-7BI Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc

Part # IS42S32800J-7BI
Description  Internal bank for hiding row access/precharge
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS42S32800J-7BI Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. - www.issi.com
Rev. 0A
8/14/2014
IS42S32800J, IS45S32800J
PIN FUNCTIONS
Symbol
Type
Function (In Detail)
A0-A11
Input Pin
AddressInputs:A0-A11aresampledduringtheACTIVE
command(row-addressA0-A11)andREAD/WRITEcommand(columnaddress
A0-A8), with A10 defining auto precharge) to select one location out of the memory
arrayintherespectivebank.A10issampledduringaPRECHARGEcommandto
determineifallbanksaretobeprecharged(A10HIGH)orbankselectedby
BA0,BA1(LOW).Theaddressinputsalsoprovidetheop-codeduringaLOAD
MODEREGISTERcommand.
BA0,BA1
Input Pin
BankSelectAddress:BA0andBA1defineswhichbanktheACTIVE,READ,WRITE
orPRECHARGEcommandisbeingapplied.
CAS
Input Pin
CAS
, in conjunction with the RAS and WE, forms the device command. See the
"CommandTruthTable"fordetailsondevicecommands.
CKE
Input Pin
TheCKEinputdetermineswhethertheCLKinputisenabled.Thenextrisingedge
oftheCLKsignalwillbevalidwhenisCKEHIGHandinvalidwhenLOW.WhenCKE
isLOW,thedevicewillbeineitherpower-downmode,clocksuspendmode,orself
refresh mode. CKE is an asynchronous input.
CLK
Input Pin
CLKisthemasterclockinputforthisdevice.ExceptforCKE,allinputstothisdevice
are acquired in synchronization with the rising edge of this pin.
CS
Input Pin
TheCS input determines whether command input is enabled within the device.
Command input is enabled when CSisLOW,anddisabledwithCSisHIGH.The
device remains in the previous state when CSisHIGH.
DQM0-DQM3
Input Pin
DQM0-DQM3controlthefourbytesoftheI/Obuffers(DQ0-DQ31).Inread
mode,DQMncontroltheoutputbuffer.WhenDQMnisLOW,thecorrespondingbuf-
ferbyteisenabled,andwhenHIGH,disabled.TheoutputsgototheHIGHimped-
ancestatewhenDQMnisHIGH.ThisfunctioncorrespondstoOE in conventional
DRAMs.Inwritemode,DQMncontroltheinputbuffer.WhenDQMnisLOW,the
correspondingbufferbyteisenabled,anddatacanbewrittentothedevice.When
DQMnisHIGH,inputdataismaskedandcannotbewrittentothedevice.
DQ0-DQ31
Input/OutputPin
DataontheDataBusislatchedonthesepinsduringWritecommands,andbufferedafter
Readcommands.
RAS
Input Pin
RAS
, in conjunction with CAS and WE, forms the device command. See the "Com-
mandTruthTable"itemfordetailsondevicecommands.
WE
Input Pin
WE
, in conjunction with RAS and CAS, forms the device command. See the "Com-
mandTruthTable"itemfordetailsondevicecommands.
Vddq
Power Supply PinVddq is the output buffer power supply.
Vdd
Power Supply PinVdd is the device internal power supply.
Vssq
Power Supply PinVssq is the output buffer ground.
Vss
Power Supply PinVss is the device internal ground.


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