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IS49NLS18320A Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS49NLS18320A Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 36 page IS49NLS96400A, IS49NLS18320A Integrated Silicon Solution, Inc. – www.issi.com – Rev. 00A, 9/10/2014 1 576Mb (64Mbx9, 32Mbx18) Seperate I/O RLDRAM 2 Memory FEATURES 533MHz DDR operation (1.067 Gb/s/pin data rate) 38.4Gb/s peak bandwidth (x18 at 533 MHz clock frequency) Reduced cycle time (15ns at 533MHz) 32ms refresh (16K refresh for each bank; 128K refresh command must be issued in total each 32ms) 8 internal banks Non-multiplexed addresses (address multiplexing option available) SRAM-type interface Programmable READ latency (RL), row cycle time, and burst sequence length Balanced READ and WRITE latencies in order to optimize data bus utilization Data mask signals (DM) to mask signal of WRITE data; DM is sampled on both edges of DK. Differential input clocks (CK, CK#) Differential input data clocks (DKx, DKx#) On-die DLL generates CK edge-aligned data and output data clock signals Data valid signal (QVLD) HSTL I/O (1.5V or 1.8V nominal) 25-60 Ω matched impedance outputs 2.5V VEXT, 1.8V VDD, 1.5V or 1.8V VDDQ I/O On-die termination (ODT) RTT IEEE 1149.1 compliant JTAG boundary scan Operating temperature: Commercial (TC = 0° to +95°C) Industrial (TC = -40°C to +95°C; TA = -40°C to +85°C) OPTIONS Package: 144-ball FBGA (leaded) 144-ball FBGA (lead-free) Configuration: 64Mx9 32Mx18 Clock Cycle Timing: Speed Grade -18 -25E -25 -33 Unit tRC 15 15 20 20 ns tCK 1.875 2.5 2.5 3.3 ns Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances RLDRAM is a registered trademark of Micron Technology, Inc. ADVANCED INFORMATION SEPTEMBER 2014 |
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