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MB9AF154NB Datasheet(PDF) 8 Page - SPANSION

Part # MB9AF154NB
Description  This document states the current technical specifications regarding
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D a t a S h e e t
April 28, 2015, MB9A150RB_DS706-00047-3v0-E
5
CONFIDENTIAL
 External Interrupt Controller Unit
 Up to 24 external interrupt input pins
 Include one non-maskable interrupt (NMI) input pin
 Watchdog Timer (Two channels)
A watchdog timer can generate interrupts or a reset when a time-out value is reached.
This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog.
The Hardware watchdog timer is clocked by the built-in Low-speed CR oscillator. Therefore, the Hardware
watchdog is active in any low-power consumption modes except RTC, Stop, Deep Standby RTC and Deep
Standby Stop modes.
 CRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator calculates the CRC which has a heavy software processing load, and achieves a
reduction of the integrity check processing load for reception data and storage.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
 CCITT CRC16 Generator Polynomial: 0x1021
 IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
 Clock and Reset
[Clocks]
Selectable from five clock sources (2 external oscillators, 2 built-in CR oscillators, and Main PLL).
 Main Clock:
4 MHz to 48 MHz
 Sub Clock:
32.768 kHz
 Built-in High-speed CR Clock: 4 MHz
 Built-in Low-speed CR Clock:
100 kHz
 Main PLL Clock
[Resets]
 Reset requests from INITX pin
 Power-on reset
 Software reset
 Watchdog timers reset
 Low-voltage detection reset
 Clock Super Visor reset
 Clock Super Visor (CSV)
Clocks generated by built-in CR oscillators are used to supervise abnormality of the external clocks.
 If external clock failure (clock stop) is detected, reset is asserted.
 If external frequency anomaly is detected, interrupt or reset is asserted.
 Low-Voltage Detector (LVD)
This Series includes 2-stage monitoring of voltage on the VCC pins. When the voltage falls below the
voltage that has been set, Low-Voltage Detector generates an interrupt or reset.
 LVD1: error reporting via interrupt
 LVD2: auto-reset operation


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