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MB9BF321M Datasheet(PDF) 8 Page - SPANSION |
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MB9BF321M Datasheet(HTML) 8 Page - SPANSION |
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8 / 113 page  D a t a S h e e t March 18, 2015, MB9B320M_DS706-00049-3v0-E 5 CONFIDENTIAL Real-time clock (RTC) The Real-time clock can count Year/Month/Day/Hour/Minute/Second/A day of the week from 01 to 99. The interrupt function with specifying date and time (Year/Month/Day/Hour/Minute/Second/A day of the week.) is available. This function is also available by specifying only Year, Month, Day, Hour or Minute. Timer interrupt function after set time or each set time. Capable of rewriting the time with continuing the time count. Leap year automatic count is available. Watch Counter The Watch counter is used for wake up from Sleep and Timer mode. Interval timer: up to 64 s (Max) @ Sub Clock : 32.768 kHz External Interrupt Controller Unit Up to 23 external interrupt input pins @ 80 pin Package Include one non-maskable interrupt (NMI) input pin Watchdog Timer (Two channels) A watchdog timer can generate interrupts or a reset when a time-out value is reached. This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog. The "Hardware" watchdog timer is clocked by the built-in Low-speed CR oscillator. Therefore, the "Hardware" watchdog is active in any low-power consumption modes except RTC, Stop, Deep Standby RTC, Deep Standby Stop modes. CRC (Cyclic Redundancy Check) Accelerator The CRC accelerator calculates the CRC which has a heavy software processing load, and achieves a reduction of the integrity check processing load for reception data and storage. CCITT CRC16 and IEEE-802.3 CRC32 are supported. CCITT CRC16 Generator Polynomial: 0x1021 IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7 Clock and Reset [Clocks] Selectable from five clock sources (2 external oscillators, 2 built-in CR oscillators, and Main PLL). Main Clock: 4 MHz to 48 MHz Sub Clock: 32.768 kHz Built-in High-speed CR Clock: 4 MHz Built-in Low-speed CR Clock: 100 kHz Main PLL Clock [Resets] Reset requests from INITX pin Power-on reset Software reset Watchdog timers reset Low-voltage detection reset Clock Super Visor reset Clock Super Visor (CSV) Clocks generated by built-in CR oscillators are used to supervise abnormality of the external clocks. If external clock failure (clock stop) is detected, reset is asserted. If external frequency anomaly is detected, interrupt or reset is asserted. |
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