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MB9B560R Datasheet(PDF) 11 Page - SPANSION |
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MB9B560R Datasheet(HTML) 11 Page - SPANSION |
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11 / 181 page  D a t a S h e e t 10 MB9B560R_DS709-00001-2v0-E, February 2, 2015 CONFIDENTIAL External Interrupt Controller Unit External interrupt input pin: Max 16 pins Include one non-maskable interrupt (NMI) Watchdog Timer (two channels) A watchdog timer can generate interrupts or a reset when a time-out value is reached. This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog. "Hardware" watchdog timer is clocked by low-speed internal CR oscillator. Therefore, "Hardware" watchdog is active in any power saving mode except STOP. CRC (Cyclic Redundancy Check) Accelerator The CRC accelerator helps a verify data transmission or storage integrity. CCITT CRC16 and IEEE-802.3 CRC32 are supported. CCITT CRC16 Generator Polynomial: 0x1021 IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7 SD Card Interface It is possible to use the SD card that conforms to the following standards. Part 1 Physical Layer Specification version 3.01 Part E1 SDIO Specification version 3.00 Part A2 SD Host Controller Standard Specification version 3.00 1-bit or 4-bit data bus Clock and Reset [Clocks] Five clock sources (2 external oscillators, 2 internal CR oscillator, and Main PLL) that are dynamically selectable. Main clock: 4 MHz to 48 MHz Sub Clock : 32.768 kHz High-speed internal CR Clock: 4 MHz Low-speed internal CR Clock: 100 kHz Main PLL Clock [Resets] Reset requests from INITX pin Power on reset Software reset Watchdog timers reset Low voltage detector reset Clock supervisor reset |
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