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MB9B610T Datasheet(PDF) 8 Page - SPANSION

Part # MB9B610T
Description  This document states the current technical specifications regarding
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D a t a S h e e t
February 10, 2015, MB9B610T-DS706-00014-3v0-E
5
CONFIDENTIAL
Dual Timer (32-/16-bit Down Counter)
The Dual Timer consists of two programmable 32-/16-bit down counters.
Operation mode is selectable from the followings for each channel.
 Free-running
 Periodic (=Reload)
 One-shot
Watch Counter
The Watch counter is used for wake up from power saving mode.
Interval timer: up to 64 s (Max)@ Sub Clock : 32.768 kHz
External Interrupt Controller Unit
 Up to 32 external interrupt input pin
 Include one non-maskable interrupt(NMI)
Watch dog Timer (2 channels)
A watchdog timer can generate interrupts or a reset when a time-out value is reached.
This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog.
"Hardware" watchdog timer is clocked by low speed internal CR oscillator. Therefore, "Hardware"
watchdog is active in any power saving mode except STOP mode.
CRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator helps a verify data transmission or storage integrity.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
 CCITT CRC16 Generator Polynomial: 0x1021
 IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
Clock and Reset
[Clocks]
Five clock sources (2 external oscillators, 2 internal CR oscillator, and Main PLL) that are dynamically
selectable.
 Main Clock
: 4MHz to 50 MHz
 Sub Clock
: 32.768 kHz
 High-speed internal CR Clock
: 4 MHz
 Low-speed internal CR Clock
: 100 kHz
 Main PLL Clock
[Resets]
 Reset requests from INITX pin
 Power on reset
 Software reset
 Watchdog timers reset
 Low voltage detector reset
 Clock supervisor reset


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