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ADC12L032CIWM Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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ADC12L032CIWM Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 36 page Pin Descriptions (Continued) 1V DCto 3.3 VDC and the voltage at VREF+ can- not exceed V A+. See Figure 6 for recom- mended bypassing. V REF− The negative voltage reference input. In order to maintain accuracy the voltage at this pin must not go below GND or exceed V A+. (See Figure 6 ). V A+, VD+ These are the analog and digital power supply pins. V A + and V D + are not connected together on the chip. These pins should be tied to the same power supply and bypassed separately (see Figure 6 ). The operating voltage range of V A+ and VD+ is 3.0 VDC to 5.5 VDC. DGND This is the digital ground pin (see Figure 6 ). AGND This is the analog ground pin (see Figure 6 ). www.national.com 4 |
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