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ADN2913ACPZ-RL7 Datasheet(PDF) 10 Page - Analog Devices

Part # ADN2913ACPZ-RL7
Description  Continuous Rate 6.5 Mbps to 8.5 Gbps Clock and Data Recovery IC with Integrated Limiting Amp/EQ
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADN2913ACPZ-RL7 Datasheet(HTML) 10 Page - Analog Devices

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ADN2913
Data Sheet
Rev. A | Page 10 of 37
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NC = NO CONNECT. TIE OFF TO GROUND.
2. THE EXPOSED PAD ON THE BOTTOM OF THE DEVICE
PACKAGE MUST BE CONNECTED TO VEE ELECTRICALLY.
THE EXPOSED PAD WORKS AS A HEAT SINK.
2
1
3
4
5
6
18
17
16
15
14
13
LOL
LOS
VEE
NIN
PIN
VCC
VCC
DATOUTN
DATOUTP
NC
VDD
VCC
ADN2913
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 5. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Type1
Description
1
VCC
P
1.2 V Supply for Limiting Amplifier.
2
PIN
AI
Positive Differential Data Input (CML).
3
NIN
AI
Negative Differential Data Input (CML).
4
VEE
P
Ground for Limiting Amplifier.
5
LOS
DO
Loss of Signal Output (Active High).
6
LOL
DO
Loss of Lock Output (Active High).
7
VEE
P
Digital Control Oscillator (DCO) Ground.
8
VCC1
P
1.8 V to 3.3 V DCO Supply.
9
VDD
P
3.3 V High Supply.
10
CLKOUTN
DO
Negative Differential Recovered Clock Output (CML).
11
CLKOUTP
DO
Positive Differential Recovered Clock Output (CML).
12
VEE
P
Ground for CML Output Drivers.
13
VCC
P
1.2 V Supply for CML Output Drivers.
14
DATOUTN
DO
Negative Differential Retimed Data Output (CML).
15
DATOUTP
DO
Positive Differential Retimed Data Output (CML).
16
DNC
DI
Do Not Connect. Leave this pin unconnected or tie it to VEE (ground).
17
VDD
P
3.3 V High Supply.
18
VCC
P
1.2 V Core Digital Supply.
19
SCK
DI
Clock for I2C Interface.
20
SDA
DIO
Bidirectional Data for I2C Interface.
21
VCC
P
1.2 V Core Digital Supply.
22
I2C_ADDR
DI
I2C Address Setting. Sets the device I2C address = 0x80 when I2C_ADDR = 0. Sets the device I2C address = 0x82
when I2C_ADDR = 1.
23
REFCLKN
DI
Negative Reference Clock Input (Optional).
24
REFCLKP
DI
Positive Reference Clock Input (Optional).
EPAD
P
Exposed Pad (VEE). The exposed pad on the bottom of the device package must be connected to VEE
electrically. The exposed pad works as a heat sink.
1 P = power, AI = analog input, DI = digital input, DO = digital output, DIO = digital input/output.


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