AD9680BCPZ-1250 datasheet(10/97 Pages) AD

Part #	AD9680BCPZ-1250

Description	Dual, 14-Bit, 1.25 GSPS, 1.2 V/2.5 V, Analog-to-Digital Converter

Download	97 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

10 / 97 page

Product

Overview

Online

Documentation

Design

Resources

Discussion

Sample

& Buy

AD9680

Data Sheet

Rev. C | Page 10 of 97

TIMING SPECIFICATIONS

Table 5.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

CLK+ to SYSREF+ TIMING REQUIREMENTS

See Figure 3

tSU_SR

Device clock to SYSREF+ setup time

117

ps

tH_SR

Device clock to SYSREF+ hold time

−96

ps

SPI TIMING REQUIREMENTS

See Figure 4

tDS

Setup time between the data and the rising edge of SCLK

2

ns

tDH

Hold time between the data and the rising edge of SCLK

2

ns

tCLK

Period of the SCLK

40

ns

tS

Setup time between CSB and SCLK

2

ns

tH

Hold time between CSB and SCLK

2

ns

tHIGH

Minimum period that SCLK must be in a logic high state

10

ns

tLOW

Minimum period that SCLK must be in a logic low state

10

ns

tACCESS

Maximum time delay between falling edge of SCLK and output

data valid for a read operation

6

10

ns

tDIS_SDIO

Time required for the SDIO pin to switch from an output to an

input relative to the SCLK rising edge (not shown in Figure 4)

10

ns

Timing Diagrams

SERDOUT0–

N – 54

N – 53

N – 52

N – 51

N – 1

SAMPLE N

N + 1

APERTURE

DELAY

N – 55

CLK+

CLK–

CLK+

CLK–

SERDOUT0+

SERDOUT1–

SERDOUT1+

SERDOUT2–

SERDOUT2+

SERDOUT3–

SERDOUT3+

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

A

B

C

D

E

F

G

H

I

J

CONVERTER0 MSB

CONVERTER0 LSB

CONVERTER1 MSB

CONVERTER1 LSB

ANALOG

INPUT

SIGNAL

SAMPLE N – 55

ENCODED INTO 1

8-BIT/10-BIT SYMBOL

SAMPLE N – 54

ENCODED INTO 1

8-BIT/10-BIT SYMBOL

SAMPLE N – 53

ENCODED INTO 1

8-BIT/10-BIT SYMBOL

Figure 2. Data Output Timing (Full Bandwidth Mode; L = 4; M = 2; F = 1)

Similar Part No. - AD9680BCPZ-1250

Manufacturer	Part #	Datasheet	Description
Analog Devices	AD9680BCPZ-1250	3Mb / 99P	Dual Analog-to-Digital Converter

More results

Similar Description - AD9680BCPZ-1250

Manufacturer	Part #	Datasheet	Description
Analog Devices	AD9684	1Mb / 64P	Dual, 14-Bit, 1.25 GSPS, 1.2 V/2.5 V, Analog-to-Digital Converter
	AD9691	1Mb / 72P	14-Bit, 1.25 GSPS JESD204B, Dual Analog-to-Digital Converter
	AD9739	1Mb / 50P	14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter
	AD9739BBCZ	856Kb / 48P	14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter REV. B
	AD9739A	1Mb / 44P	14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter REV. 0
	AD9625	1Mb / 56P	12-Bit, 2.0 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter REV. 0
Texas Instruments	DAC3482	2Mb / 106P	[Old version datasheet] Dual-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC)
	DAC3482IRKD25	1Mb / 87P	[Old version datasheet] Dual-Channel, 16-BIT, 1.25 GSPS Digital-to-Analog Converter (DAC)
	ADC32RF44	7Mb / 134P	[Old version datasheet] Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter
Analog Devices	AD9208	1Mb / 137P	14-Bit, 3 GSPS, JESD204B, Dual Analog-to-Digital Converter

More results

AD9680BCPZ-1250 Datasheet(PDF) 10 Page - Analog Devices

AD9680BCPZ-1250 Datasheet(HTML) 10 Page - Analog Devices

Similar Part No. - AD9680BCPZ-1250

Similar Description - AD9680BCPZ-1250

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

Datasheet Download

Link URL