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ADuM7642CRQZ Datasheet(PDF) 8 Page - Analog Devices |
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ADuM7642CRQZ Datasheet(HTML) 8 Page - Analog Devices |
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8 / 20 page  ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet Rev. 0 | Page 8 of 20 ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 3.3 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recom- mended operation range of 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 10. A Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Pulse Width PW 250 40 ns Within PWD limit Data Rate 1 25 Mbps Within PWD limit Propagation Delay tPHL, tPLH 80 29 46 60 ns 50% input to 50% output Pulse Width Distortion PWD 25 2 6 ns |tPLH − tPHL| Change vs. Temperature 5 3 ps/°C Propagation Delay Skew1 tPSK 20 14 ns Channel Matching Codirectional2 tPSKCD 25 6 13 ns Opposing Directional3 tPSKOD 30 9 18 ns Jitter 2 2 ns 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. 3 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Table 11. 1 Mbps—A, C Grades 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT No load ADuM7640 IDD1 4.1 4.9 32 38 mA IDD2 4.5 5.9 11 13 mA ADuM7641 IDD1 3.9 4.7 27 33 mA IDD2 4.6 5.7 15 19 mA ADuM7642 IDD1 3.7 4.4 23 27 mA IDD2 4.8 6.0 19 24 mA ADuM7643 IDD1 3.5 4.2 18 21 mA IDD2 5.0 6.2 22 29 mA Table 12. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Voltage Threshold Logic High VIH 0.7 VDDx V Logic Low VIL 0.3 VDDx V Output Voltages Logic High VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH VDDx − 0.5 VDDx − 0.2 V IOx = −4 mA, VIx = VIxH Logic Low VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL Input Current per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ VDDx AC SPECIFICATIONS Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient Immunity1 |CM| 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 550 kHz DC data inputs 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOL < 0.8 VDDLx or VOH > 0.7 × VDDIx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. |
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